• Progress in Superconductivity
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• v.7 no.1
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• pp.36-40
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• 2005

The problem of fluctuation-induced digital errors in a rapid single flux quantum (RSFQ) circuit has been a very important issue. In this work, we calculated the bit error rate of an RSFQ switch used in superconductive arithmetic logic unit (ALU). RSFQ switch should have a very low error rate in the optimal bias. Theoretical estimates of the RSFQ error rate are on the order of $10^{-50}$ per bit operation. In this experiment, we prepared two identical circuits placed in parallel. Each circuit was composed of 10 Josephson transmission lines (JTLs) connected in series with an RSFQ switch placed in the middle of the 10 JTLs. We used a splitter to feed the same input signal to both circuits. The outputs of the two circuits were compared with an RSFQ exclusive OR (XOR) to measure the bit error rate of the RSFQ switch. By using a computerized bit-error-rate test setup, we measured the bit error rate of $2.18{\times}10^{-12}$ when the bias to the RSFQ switch was 0.398 mA that was quite off from the optimum bias of 0.6 mA.

• Journal of Internet Computing and Services
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• v.9 no.2
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• pp.15-23
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• 2008

This paper proposes the new structural MOQ(Multiple Input/Output-Queued) switch which guarantees QoS while maintaining high efficiency and deals with the Anti-Empty algorithm which is new arbitration algorithm to be used for the proposed switch. The new structure of the proposed switch based on MIQ, MOQ is designed to have the same buffer speed as the external line speed. Also, the proposed switch makes it possible to remove the weak point of existing methods and introduces the new method of the MOQ operation to support QoS. Therefore, this switch is equal to the Output Queued switch in efficiency and delay, and guarantees the high-speed switching supporting QoS without cell loss.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.760-767
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• 2014

This paper describes a high-radix crossbar switch design with low latency and power dissipation for Network-on-Chip (NoC) applications. The reduction in latency and power is achieved by employing a folded-clos topology, implementing the switch organized as three stages of low-radix switches connected in cascade. In addition, to facilitate the uniform placement of wires among the sub-switch stages, this paper proposes a Mux-Matrix-Mux structure, which implements the first and third switch stages as multiplexer-based crossbars and the second stage as a matrix-type crossbar. The proposed 256-radix, 8-bit crossbar switch designed in a 65nm CMOS has the simulated power dissipation of 1.92-W and worst-case propagation delay of 0.991-ns while operating at 1.2-V supply and 500-MHz frequency. Compared with the state-of-the-art designs in literature, the proposed crossbar switch achieves the best energy-delay-area efficiency of $0.73-fJ/cycle{\cdot}ns{\cdot}{\lambda}^2$.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.4
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• pp.366-373
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• 2011

The magnetic switch used in pulsed-power applications is superior in its high repetition rate, high stability, and long lifetime. But magnetic switch was optimized switching operation by manual control. When the load changes, the switching state can not be optimized automatically. In this paper, the auto control method of magnetic switch for high pulsed-power proposed. The magnetic switch is used capacitor charging power supply for high-voltage compressor. The proposed method can be optimized an efficiency of the system by magnetic switch auto control according to load variation. And the proposed method verify the experimental results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.8
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• pp.1849-1854
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• 2010

As for information system in hospital which digital hospital aims at, there are PACS(Picture Archiving and Communication System) and soon. PACS transfer and store various medical pictures which are occurring in hospital. The various medical pictures is captured by using keyboard or foot switch during a surgical operation. In this paper, foot switch USB module that can be mounted into a main foot switch case is designed and implemented, it is having a MCU circuit with a built-in micro-controller and a I/O interface having a maximum of five switch. we also developed foot switch control software program with various functions. The result of using the module in the hospital field confirms that the module operates safely.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.289-440
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• 1998

This paper describes an interconnection network structure which transports information among processors through a high speed ATM switch. To efficiently use the high speed ATM switch for the message-based multiprocessor, we implemented the cell router that performs multiplexing and demultiplexing of cells from/to processors. In this system, we use the expanded internal cell format including 3bytes for switch routing information. This interconnection network has 3 stage routing strategies: ATM switch routing using switch routing information, cell router routing using a virtual path identifier (VPI) and cell reassembly routing using a virtual channel indentifier (VCI). The interconnection network consists of the NxN folded switch and N cell routers with the M processor interface. Therefore, the maximum number of NxM processors can be interconnected for message communication. This interconnection network using the ATM switch makes a significant improvement in terms of message passing latency and scalability. Additionally, we evaluated the transmission overhead in this interconnection network using ATM switch.

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.30-37
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• 2007

This paper proposes a detection method of position of OFF-switch. Each switch has the parallel path with a serial combination of passive element, its parallel path has each different frequency characteristics. Frequency characteristic of ON-switch reveals a flat spectrum irrelevant to frequency characteristic of passive element connected in parallel to its each terminal and frequency characteristic of OFF-switch reveals the same characteristic as one of passive element connected in parallel. Detection of position of OFF-switch is done by measuring the similarity of each spectrum corresponding to frequency characteristic of passive element connected in parallel to OFF-switch. The measure of their similarity is to calculate Euclidean distance between their test spectrum and reference spectrum. The spectrum with the smallest distance among reference spectrum is recognized as the spectrum of OFF-switch. The real time digital signal processing system is implemented to detect the position of OFF-switch by using spectrum matching.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.5
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• pp.703-717
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• 2002

This paper illustrates the implementation of a scalable shared buffer asynchronous transfer mode (ATM) switch. The designed shared buffer ATM switch has a shared buffet of a pipelined memory which has the access time of 4 ns. The high-speed buffer access time supports a possibility of the implementation of a shared buffer ATM switch which has a large switching capacity. The designed switch architecture provides flexible switching performance and port size scalability with the independence of queue address control from buffer memory control. The switch size and the buffer size of the designed ATM switch can be reconfigured without serious circuit redesign. The designed prototype chip has a shared buffer of 128-cell and 4 ${\times}$ 4 switch size. It is integrated in 0.6um, double-metal, and single-poly CMOS technology. It has 80MHz operating frequency and supports 640Mbps per port.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.869-872
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• 2005

In this paper we present a switch wrapper for an AMBA AXI, which is an efficient on-chip-network interface compared to bus-based interfaces in a multiprocessor SoC. The AXI uses an idea of NoC to provide the increasing demands on communication bandwidth within a single chip. A switch wrapper for AXI is located between a interconnection network and two IPs connecting them together. It carries out a mode of routing to interconnection network and executes protocol conversions to provide compatibility in IP reuse. A switch wrapper consists of a direct router, AHB-AXI converters, interface modules and a controller modules. We propose the design of a all-in-one type switch wrapper.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.361-362
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• 2016

Presented in this paper is the design of a high voltage switch module made up of MOSFETs, pulse transformers and their gate driver circuits compactly fitted onto a single PCB module. The ease by which the switch modules can be configured (series stacking and/or parallel stacking) to meet future load variations allows for flexible operation of this design. In addition, the detailed implementation of the gate driver circuit for reliable and easier switch synchronization is also described in this paper. The stored energy in the capacitor bank of a 15kV, 4.5kJ/s peak power capacitor charger was discharged using the developed high voltage switch, and by experimental results, the operation of the proposed circuit was verified to be effectively used as a switch for pulse discharging.