• Title/Summary/Keyword: switch mode power supply

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Experimental Test Results of Nine Scheduling Operational Modes of PV and Battery Hybrid System for the Development of Automatic Control Algorithm for Continual Operation without being shut-downed (태양광 배터리 Hybrid 전력공급시스템 9가지 운전 모드 시험결과 및 무고장 연속 운전을 위한 자동제어 알고리즘 개발)

  • Song, Taek Ho;Yang, Seung Kwon;Kim, Minjeong
    • KEPCO Journal on Electric Power and Energy
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    • v.5 no.1
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    • pp.25-32
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    • 2019
  • K-BEMS System was introduced to reduce peak load and to save total energy of the 200 buildings that KEPCO headquarter and branch offices use. And K-BEMS system is composed of PV, battery, and hybrid PCS. KEPCO research institute has carried out this K-BEMS research project for 3 years since January 2016. In this paper, the results of the project are shown. 9 modes of test results of K-BEMS system and are operational problems were analyzed. And measures to cure the trouble are also suggested. Batteries are operated more than 20% of SOC, and less than 20% of SOC battery protection switches are automatically shutting down the system and the system no longer respond to EMS, ending the supply of PV, and so therefore to continue the PV power supply it was turn out to be necessary that the EMS should automatically change its policy to change PV only supply mode automatically when the Battery Switch automatically operated. To operate the system continuously and automatically, it is necessary to modify the minimum operational SOC value, and in addition to that the EMS computer must remember the last shut-down SOC and Voltage which interrupted the system and add some margin to reflect the measurement error in the system.

A Study on the Design of D/A Converter based on Data Weighted Average Technique for enhancement of reliability (혼합형 전류 구동 D/A 컨버터 설계 제작에 있어서 데이터 가중평균기법을)

  • Kim, S.D.;Woo, Y.S.;Kim, D.G.;Sung, M.Y.
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3215-3217
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    • 1999
  • In this paper, a new structure of realizing switching control logic for Data Weighted Average Technique is suggested. It uses memory and adder for summing past binary input and this summed data is used to select one switch in control logic. This control logic acts in parallel regardless of resolution so increasing resolution don't affect on converting speed. In this reason, high speed and high resolution D/A converter based on Data Weighted Average Technique could be made. In this paper, 4 bits current mode thermometer code D/A converter is degined and simulated by using HSPICE. Simulated results show that new structure of D/A converter has more than 250MHz converting speed and less than 0.0003[LSB] INL error. It is very useful in low power circuit because of using 3.3 V supply voltage.

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ZVS Flyback Converter Using a Auxiliary Circuit (보조회로를 이용한 영전압 스위칭 플라이백 컨버터)

  • 김태웅;강창수
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.37 no.5
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    • pp.11-116
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    • 2000
  • A topology decreased switching loss and voltage stress by zero voltage switching is presented in this paper. Generally, Switching mode converting productes voltage stress and power losses due to excessive voltage and current. which affect to performance of power supply and reduce overall efficiency of equipments. Virtually, In flyback converter, transient peak voltage and current at switcher are generated by parasitic elements. To solve these problems, present ZVS flyback converter topology applied a auxiliary circuit. Incorporation of auxiliary circuit into a conventional flyback topology serves to reduce power losses and to minimize switching voltage stress. Snubber capacitor in auxiliary circuit serves ZVS state by control voltage variable time at turn on and off of main switch, then reduces voltage stress and power losses. The proposed converter has lossless switching in variable load condition with wide range. A detailed analysis of the circuit is presented and the operation procedure is illustrated. A (50W 100kHz prototype) ZVS flyback converter using a auxiliary circuit is built which shows an efficiency improvement as compared to a conventional hard switching flyback converter.

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Design of Low-Area and Low-Power 1-kbit EEPROM (저면적.저전력 1Kb EEPROM 설계)

  • Yu, Yi-Ning;Yang, Hui-Ling;Jin, Li-Yan;Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.4
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    • pp.913-920
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    • 2011
  • In this paper, a logic process based 1-kbit EEPROM IP for RFID tag chips of 900MHz is designed. The cell array of the designed 1-kbit EEPROM IP is arranged in a form of four blocks of 16 rows x 16 columns, that is in a two-dimensional arrangement of one-word EEPROM phantom cells. We can reduce the IP size by making four memory blocks share CG (control gate) and TG (tunnel gate) driver circuits. We propose a TG switch circuit to supply respective TG bias voltages according to operational modes and to keep voltages between devices within 5.5V in terms of reliability in order to share the TG driver circuit. Also, we can reduce the power consumption in the read mode by using a partial activation method to activate just one of four memory blocks. Furthermore, we can reduce the access time by making BL (bit line) switching times faster in the read mode from reduced number of cells connected to each column. We design and compare two 1-kbit EEPROM IPs, two blocks of 32 rows ${\times}$ 16 columns and four blocks of 16 rows ${\times}$ 16 columns, which use Tower's $0.18{\mu}m$ CMOS process. The four-block IP is smaller by 11.9% in the layout size and by 51% in the power consumption in the read mode than the two-block counterpart.

Development of a Programmable Multi-Output Adapter (프로그램 가능한 다출력 아답타 개발)

  • Chai, Yong-Yoong;Do, Wang-Lok
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.6
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    • pp.699-706
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    • 2015
  • A previous adapter have a single-ouput, however, a demand of a multi-output adapter increase in the recent industrial site. In order to satisfy the demand, in this research, we implement a programmable high efficiency multi-output adapter. The basic structure of the adapter introduced in this paper is a sort of flyback. The way for producing the reference voltage of the adapter proposed is similar to the way in the general flyback implemented with TL431. In addition to the basic concept of the design, however, we introduce a digital variable resistor, AD5246BKSZ10-RL7 and a microcontroller for changing a programmable multi-output. It makes output be variable that the digital variable resistor change the reference voltage of the adapter by order of the microcontroller. The adapter output voltage is controllable in the range of 20V by the user, and the power efficiency is proven to be 85%.

Reduction of Conducted Emission in Interleaved RPWM Buck Converter (인터리브드 RPWM Buck 컨버터의 전도성 노이즈 감소에 대한 연구)

  • Lee, Seunghyun;Lee, Keunbong;Nah, Wansoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.4
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    • pp.298-308
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    • 2017
  • This paper presents a Interleaved Buck Converter(IBC) system with Random PWM to reduce electromagnetic noise by harmonics. Swithced mode power supply generally controlled by high switching frequency have a electromagnetic interference(EMI) issue due to the high-voltage/high-current switching to regulate the voltage in buck converter. To solve the problem. we present a novel IBC system with PRBS. IBC system has two active switches with 180 phase difference that controll the cicuit with two PWM signal. IBC system may be disadventageous for the cost due to the addtion of one set of switch, but it has adventages of power distribution, current ripple cancellation, fast transient response, and passive component size reduction. To verify the validity of study, simulation program has been bulit using PSIM and the experimental results of IBC system using RPWM was compared with the conventinal PWM and randomized PWM.

A 0.18-um CMOS 920 MHz RF Front-End for the IEEE 802.15.4g SUN Systems (IEEE 802.15.4g SUN 표준을 지원하는 920 MHz 대역 0.18-um CMOS RF 송수신단 통합 회로단 설계)

  • Park, Min-Kyung;Kim, Jong-Myeong;Lee, Kyoung-Wook;Kim, Chang-Wan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.423-424
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    • 2011
  • This paper has proposed a 920 MHz RF front-end for IEEE 802.15.4g SUN (Smart Utility Network) systems. The proposed 920 MHz RF front-end consists of a driver amplifier, a low noise amplifier, and a RF switch. In the TX mode, the driver amplifier has been designed as a single-ended topology to remove a transformer which causes a loss of the output power from the driver amplifier. In addition, a RF switch is located in the RX path not the TX path. In the RX mode, the proposed low noise amplifier can provide a differential output signal when a single-ended input signal has been applied to. A LC resonant circuit is used as both a load of the drive amplifier and a input matching circuit of the low noise amplifier, reducing the chip area. The proposed 920 MHz RF Front-end has been implemented in a 0.18-um CMOS technology. It consumes 3.6 mA in driver amplifier and 3.1 mA in low noise amplifier from a 1.8 V supply voltage.

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Development of Operation Control and AC/DC Conversion Integrated Device for DC Power Application of Small Wind Power Generation System (소형 풍력발전시스템의 직류전원 적용을 위한 운전제어 및 AC/DC변환 통합장치 개발)

  • Hong, Kyungjin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.3
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    • pp.179-184
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    • 2019
  • In many countries, such as developing countries where electricity is scarce, small wind turbines in the form of Off Grid are an effective solution to solve power supply problems. In some countries, the expansion of power systems and the decline of electricity-intensive areas have led to the use of small wind power in urban road lighting, mobile communications base stations, aquaculture and seawater desalination. With this change, the size of the small wind power industry is expected to have greater potential than large-scale wind power. In the case of small wind power generators, the generator is controlled at a variable speed, and the voltage and current generated by the generator have many harmonic components. To solve this problem, the AC to DC converter to be studied in this paper is a three-phase step-up type converter with a single switch. The inductor current is controlled in discontinuous mode, and has a characteristic of having a unit power factor by eliminating the harmonic of the input current. The proposed converter is composed of LCL filter and three phase rectification boost converter at the input stage and a single phase full bridge for grid connection. It is a control system with energy storage system(ESS) that the system stabilization can be pursued against the electric power.

The design of the high efficiency DC-DC Converter with Dynamic Threshold MOS switch (Dynamic Threshold MOS 스위치를 사용한 고효율 DC-DC Converter 설계)

  • Ha, Ka-San;Koo, Yong-Seo;Son, Jung-Man;Kwon, Jong-Ki;Jung, Jun-Mo
    • Journal of IKEEE
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    • v.12 no.3
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    • pp.176-183
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    • 2008
  • The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

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A Comparative Study on Power System Harmonics for Offshore Plants (해양플랜트 전력시스템의 고조파 비교분석에 관한 연구)

  • Kim, Deok-Ki;Lee, Won-Ju;Kim, Jong-Su
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.22 no.7
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    • pp.900-905
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    • 2016
  • The field of power system harmonics has been receiving a great deal of attention recently. This is primarily due to the fact that non-linear (or harmonic-producing) loads comprise an ever-increasing portion of what is handled at a typical industrial plant. The incidence rate of harmonic-related problems is low, but awareness of harmonic issues can still help increase offshore power plant system reliability. On the rare occasion that harmonics become a problem, this is either due to the magnitude of harmonics produced or power system resonance. This harmonic study used an electrical configuration for the offloading scenario of a Floating LNG (FLNG) unit, considering power load. This electrical network configuration is visible in the electrical network load flow study part of the project. This study has been carried out to evaluate the performance of an electric power system, focusing on the harmonic efficiency of an electrically driven motor system to ensure offshore plant safety. In addition, the design part of this study analyzed the electric power system of an FLNG unit to improve the safety of operation and maintenance.