• Journal of electromagnetic engineering and science
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• v.13 no.2
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• pp.93-103
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• 2013

This paper presented a novel approach for the design of a tunable dual-band bandpass filter (BPF) with independently tunable passband center frequencies and bandwidths. The newly proposed dual-band filter principally comprised two dual-mode single band filters using common input/output lines. Each single BPF was realized using a varactor-loaded transmission line resonator. To suppress the harmonics over a broad bandwidth, a defected ground structure was used at the input/output feeding lines. From the experimental results, it was found that the proposed filter exhibited the first passband center frequency tunable range from 1.48 to 1.8 GHz with a 3-dB fractional bandwidth (FBW) variation from 5.76% to 8.55%, while the second passband center's frequency tunable range was 2.40 to 2.88 GHz with a 3-dB FBW variation from 8.28% to 12.42%. The measured results of the proposed filters showed a rejection level of 19 dB up to more than 10 times the highest center frequency of the first passband.

• Journal of Energy Engineering
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• v.10 no.3
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• pp.286-293
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• 2001

Recently, as the power demand grows, the concern on the Energy Storage System (ESS) is being increased. Among the various type of ESS, it is revealed that the Battery Energy Storage System (BESS) is the most economic and applicable. In this paper, the operating algorithm of the BESS including the solution of the power quality problem is studied. The BESS is connected to the power system in parallel, and the functions of the reactive power suppression and the harmonics and unbalanced current elimination, are added to the functions of the BESS. Through the computer simulations and experiments, the functions of the proposed algorithms are verified.

• Journal of Navigation and Port Research
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• v.28 no.1
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• pp.37-41
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• 2004

In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain can be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of $\lambda$/4 length Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.4
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• pp.86-96
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• 2008

In this paper, a new broadband rectenna is presented for the wireless transmission of microwave power. The new broadband rectenna element is based on a new printed monopole broadband antenna with size reduction using surface current distribution and a new broadband stub bandpass filter with suppression of second harmonics. A RF-to-DC conversion efficiency of 80% using a 270 ohm load resistor is obtain at 2.45 GHz. Also, a conversion efficiency of above 50 % is maintained from 1.8 GHz to 2.8 GHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.411-415
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• 2003

In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain ran be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of λ/4 length. Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.47-52
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• 2010

In this paper, a frequency tripler has been designed with 100mW medium-power using P-HEMT. It is designed to obtain 7.2GHz frequency at the output that is an integer multiple of 2.4GHz input frequency by using nonlinear device that produces 3rd harmonic. The frequency tripler is designed by using load-pull simulation. To suppress the 2nd and fundamental, notch filter is used for the frequency tripler. The tripler is designed to obtain about 21dBm output power with 15dBm input, i.e., 6dB conversion gain and the suppression of 20dBc at fundamental, and 30dBc at the second harmonics.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.109-117
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• 2004

In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.541-546
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• 2010

The push-push DRO(dielectric resonator oscillator) using a multi-layer structure of LTCC(low temperature co-fired ceramic) fabrication is designed. After the single DRO of series feedback type in the center frequency of 8GHz is designed, the push-push DRO in the center frequency of 16GHz including the Wilkinson power combiner is designed. The bias circuit affecting the size of oscillator are embedded in the intermediate layer of the LTCC multi-layer substrate. As a result, the large reduction in the size of VCO is obtained compared to the general oscillator on the single layer substrate. Experimental results show that the fundamental and third harmonics suppression are above 15dBc and 25dBc, respectively, and phase noise characteristics of the push-push DRO presents performance of -102dBc/Hz@100KHz and -128dBc/Hz@1MHz offset frequencies from carrier.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8B
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• pp.1464-1471
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• 1999

A wide-band high power amplifier to use for radiated electromagnetic field immunity testing of EMS(Electromagnetic Susceptibility) standards has to meet IEC1000-4-3 specification in the frequency bandwidth of 80MHz to 1000MHz. The power amplifier to be described in this paper consists of driving and power stages with wide-band matched circuits by estimated impedances. The mismatching protection circuit is inserted in it to prevent from damage of power device when the output port of power amplifier is opened or shorted by user's mistake. The characteristics of the power amplifier are obtained output power over 100watts, gain over 40dB and flatness of $\pm$0.3dB in the frequency range of 80 ~300MHz. The harmonics suppression characteristics is measured over 20dBc. This wide-band high power amplifier can be useful fur radiated electromagnetic field immunity testing of IEC 1000-4-3 standard.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.11
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• pp.1271-1278
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• 2007

A novel frequency multiplier using composite right/left-handed transmission line is proposed. The left-handed transmission line in the proposed frequency multiplier suppresses the fundamental component($f_0$), while the composite right/left-handed ${\lambda}/4$ open stub diminishes unwanted harmonics. Due to the combination of the left-handed transmission line and composite right/left-handed ${\lambda}/4$ open stub, the only desirable multiplied frequency component such as 3 $f_0$ and 4 $f_0$ are obtained at the output port excellently. For the example of the proposed design, frequency multipliers are designed at 1 GHz of $f_0$ and measured. The measured output power of 3 $f_0$ and 4 $f_0$ is -5.67 dBm and -6.43 dBm, respectively, when the fundamental input power was 0 dBm.