• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.24-25
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• 2006

In this study, Ni silicide on the SOI substrate doped B11 is proposed to improve thermal stability. The sheet resistance of Ni-silicide utilizing pure SOI substrate increased after the post-silicidation annealing at $600^{\circ}C$ for 30 min. However, using the proposed B11 implanted substrate, the sheet resistance showed stable characteristics after the post-silicidation annealing up to $700^{\circ}C$ for 30 min.

• Korean Journal of Metals and Materials
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• v.48 no.7
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• pp.660-666
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• 2010

30 nm thick Ni layers were deposited on a glass substrate by e-beam evaporation. Subsequently, 30 nm or 60 nm ${\alpha}-Si:H$ layers were grown at low temperatures ($<220^{\circ}C$) on the 30 nm Ni/Glass substrate by catalytic CVD (chemical vapor deposition). The sheet resistance, phase, microstructure, depth profile and surface roughness of the $\alpha-Si:H$ layers were examined using a four-point probe, HRXRD (high resolution Xray diffraction), Raman Spectroscopy, FE-SEM (field emission-scanning electron microscopy), TEM (transmission electron microscope) and AES depth profiler. The Ni layers reacted with Si to form NiSi layers with a low sheet resistance of $10{\Omega}/{\Box}$. The crystallinty of the $\alpha-Si:H$ layers on NiSi was up to 60% according to Raman spectroscopy. These results show that both nano-scale NiSi layers and crystalline Si layers can be formed simultaneously on a Ni deposited glass substrate using the proposed low temperature catalytic CVD process.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.20 no.9
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• pp.104-109
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• 2021

Tactile sensors and integrated circuits that detect external stimuli have been developed for use in various industries. Most tactile sensors have been developed using the MEMS(micro electro-mechanical systems) process in which metal electrodes and strain sensors are applied to a silicon substrate. However, tactile sensors made of highly brittle silicon lack flexibility and are prone to damage by external forces. Flexible tactile sensors based on polydimethylsiloxane and using a multi-walled carbon nano-tube mixture as a pressure-sensitive material are currently being developed as an alternative to overcome these limitations. In this study, a manufacturing process of pressure-sensitive materials with low initial electrical resistance is developed and applied to the fabrication of flexible tactile sensors. In addition, flexible tactile sensors are developed with pressure-sensitive materials dispensed on a substrate with flexible mechanical properties. Finally, a study is conducted on the change in electrical resistance of pressure-sensitive materials according to the modulus of elasticity of the substrate.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.2
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• pp.72-75
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• 2006

A CMOS compatible Super Junction LDMOS (SJ-LDMOS) structure, which reduces substrate-assisted depletion effects, is reported. The proposed structure uses a N-buffer layer between the pillars and P-substrate to achieve global charge balance between the pillars, the N-buffer layer and the P-substrate. The new structure features high breakdown voltage, low on-resistance, and reduced sensitivity to doping imbalance in the pillars.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2002.11a
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• pp.363-370
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• 2002

A substrate network model characterizing substrate effect of submicron MOS transistors for RF operation and its parameter extraction with physically meaningful values are presented. The proposed substrate network model includes a single resistance and inductance originated from ring-type substrate contacts around active devices. Model parameters are extracted from S-parameter data measured from common-bulk configured MOS transistors with floating gate and use where needed with out any optimization. The proposed modeling technique has been applied to various-sized MOS transistors. Excellent agreement the measurement data and the simulation results using extracted substrate network model up to 30GHz.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.11a
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• pp.363-370
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• 2002

A substrate network model characterizing substrate effect of submicron MOS transistors for RF operation and its parameter extraction with physically meaningful values are presented. The proposed substrate network model includes a single resistance and inductance originated from ring-type substrate contacts around active devices. Model parameters are extracted from S-parameter data measured from common-bulk configured MOS transistors with floating gate and use where needed with out any optimization. The proposed modeling technique has been applied to various-sized MOS transistors. Excellent agreement the measurement data and the simulation results using extracted substrate network model up to 30㎓

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.80-83
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• 2000

In this work we deposited Pentacene thin film by OMBD at the various substrate temperatures, deposition rate and the various annealing temperatures for the fabrication of organic TFT and investigated the electrical and film surface characteristics such as sheet resistance, contact resistance and conductance Film thickness were measured by $\alpha$-step and the sheet resistance, contact resistance and conductance were extracted from the relation between the distance of the contacts and the resistance. During the film deposition the substrate temperature was held at 3$0^{\circ}C$, 4$0^{\circ}C$, 5$0^{\circ}C$, 6$0^{\circ}C$, 8$0^{\circ}C$ and 10$0^{\circ}C$, respectively. After the film deposition, Au contact was deposited by thermal evaporation. For the effect of annealing, the thin film was annealed in the nitrogen environment at 10$0^{\circ}C$ and 14$0^{\circ}C$ for 10 seconds, respectively. Film surface characteristics at the vatious substrate temperatures were measured by AFM. The crystallization of thin film was improved as the substrate temperatures were increased and the maximum gram size was 4${\mu}{\textrm}{m}$. The conductivity of thin film was found to be 7.40 $\times$10$^{-7}$ ~ 7.78$\times$10$^{-6}$ S/cm and the minimum contact resistance was 2.5324 ㏁.

• Progress in Superconductivity
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• v.8 no.1
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• pp.81-86
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• 2006

We investigated resistance development in $Au/YBa_2Cu_3O_7(YBCO)$ thin film meander lines during high-power faults. The meander lines were fabricated by patterning 300 nm thick YBCO films coated with 200 nm thick gold layers into meander lines. A gold film grown on the back side of the substrate was also patterned into a meander line. The front meander line was connected to a high-power fault-test circuit and the back line to a DC power supply. Resistance of both lines was measured during the fault. They were immersed in liquid nitrogen during the experiment. Behavior of the resistance development prior to quench completion could be understood better by comparing resistance of the front meander lines with that of the back. Quench completion point could be determined clearly. Resistance and temperature at the quench completion point were not affected by applied field strength. The experimental results were analyzed quantitatively with the concept of heat transfer within the meander lines/substrate and to the surrounding liquid nitrogen. In analysis, the fault period was divided into three regions: flux-flow region, region prior to quench completion, and region after quench completion. Resistance was calculated for each region, reflecting the observation for quench completion. The calculated resistance in three regions was joined seamlessly and agreed well with data.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.95-97
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• 2004

We studied a low temperature ion doping process for poly-Si Thin Film Transistor (TFT) on plastic substrates. The ion doping process was performed using an ion shower system, and subsequently, excimer laser annealing (ELA) was done for the activation. We have studied the crystallinity of Si surface at each step using UV-reflectance spectroscopy and the sheet resistance using 4-point probe. We found that the temperature has increased during ion shower doping for a-Si film and the activation has not been fulfilled stably because of the thermal damage against the plastic substrate. By trying newly a pulsed ion shower doping, the ion was efficiently incorporated into the a-Si film on plastic substrate. The sheet resistance decreased with the increase of the pulsed doping time, which was corresponded to the incorporated dose. Also we confirmed a relationship between the crystallinity and the sheet resistance. A sheet resistance of 300 ${\Omega}$/sq for the Si film of 50nm thickness was obtained with a good reproducibility. The ion shower technique is a promising doping technique for ultra low temperature poly-Si TFTs on plastic substrates as well as those on glass substrates.

• Journal of Welding and Joining
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• v.13 no.3
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• pp.55-64
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• 1995

Metallizing method on ceramic surface is one of the compositing technology of ceramics and metal. The purpose of this study is to make HIC (Hybrid Intergrated Circuit) with copper metallizing method of which copper layer is formed on ceramic substrate by firing in atmosphere in lieu of conventional hybrid microcircuit systems based on noble metal. Metallizing pastes were made from various copper compounds such as Cu$_{2}$O, CuO, Cu, CuS and kaolin. And the screen printing method was used. The characteristics of metallized copper layers were analyzed through the measurement of sheet resistance, SEM, and EDZX. The results obtainted are summarized as follows; 1. The copper metallizing layers on ceramic surface can be formed by firing in air. 2. The metallized layer using Cu$_{2}$O paste showed the smallest sheet resistance among a group of copper chemical compounds. And optimum metallizing conditions are 15 minutes of firing time, 1000.deg.C of firig temperature, and 3 minutes of deoxidation time. 3. The results of EDAX analysis showed mutual diffusion of Cu and Al. 4. The kaolin plays a important role of deepening the penetration of Cu to $Al_{2}$O$_{3}$ ceramics. But if the kaolin content is too much, sheet resistance increases and copper metallizing layer becomes brittle.