• 제목/요약/키워드: substrate forward bias

검색결과 16건 처리시간 0.03초

CHE 주입방법과 기판 순바이어스를 이용한 새로운 고온 전자 주입방법의 프로그램 효율성 비교에 관한 연구 (A Study on The Comparison of The Program Efficiency in The Conventional CHE Injection Method and a novel Hot Electron Injection Method Using A Substrate forward Bias)

  • 장영걸;안호명;김희동;김태근
    • 대한전자공학회논문지SD
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    • 제47권1호
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    • pp.1-5
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    • 2010
  • 본 논문에서는, SONOS 소자에서의 일반적인 CHE(Channel Hot Electron) 주입 방법과 기판 순바이어스를 이용한 새로운 전자 주입 방법의 프로그램 효율성에 대해 직접 비교하였다. 기존의 CHE 주입 방법과 비교해서, 새로운 전자 주입 방법은 낮은 구동전압, 빠른 프로그램 속도 등의 특성을 포함하여 높은 프로그램효율을 보였으며, 또한 드레인 영역에서의 순방향 읽기와 역방향 읽기의 문턱전압 차이가 1 V 가량 발생한다는 점에서 국소 주입 동작이 가능함을 확인하였다. 이렇게 제안된 전자주입 방법은 차세대 나노 크기 멀티-비트 SONOS 소자의 동작에 매우 유용하게 사용될 것으로 기대된다.

2 단계 펄스 주입을 이용한 프로그램 방법에서 백바이어스 효과 (Back bias effects in the programming using two-step pulse injection)

  • 안호명;장영걸;김희동;서유정;김태근
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.258-258
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    • 2010
  • In this work, back bias effects in the program of the silicon-oxide-nitride-oxide-silicon (SONOS) cell using two-step pulse sequence, are investigated. Two-step pulse sequence is composed of the forward biases for collecting the electrons at the substrate terminal and back bias for injecting the hot electrons into the nitride layer. With an aid of the back bias for electron injection, we obtain a program time as short as 600 ns and an ultra low-voltage operation with a substrate voltage of -3 V.

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Si-ZnO n-n 이종접합의 구조 및 전기적 특성 (The Structure and Electrical Properties of Si-ZnO n-n Heterojunctions)

  • 이춘호;박순자
    • 한국세라믹학회지
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    • 제23권1호
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    • pp.44-50
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    • 1986
  • Si-ZnO n-n heterojunction diodes were prespared by r.f diode sputtering of the sintered ZnO target on n-type Si single crystal wafers and their structures and electrical properties were studied. The films were grown orientedly with the c-axis of crystallites perpendicular to the substrate surface at low r.f. powder and grown to polycrystalline films with random orientation at high r. f. powder. The crystallite size increased with the increasing substrate temperture The oriented texture films only were used to prepare the photovoltaic diodes and these didoes showed the photovoltaic effect veing positive of the ZnO side for the photons in the wavelength range of 380-1450nm. The sign reversal of phootovoltage which is the property os isotype heterojunction was not observed because of the degeneration of the ZnO films. The diode showed the forward rectification when it was biased with the ZnO side positive. The current-voltage characteristics exhibited the thermal-current type relationship J∝exp(qV/nkT) with n=1.23 at the low forward bias voltage and the tunnelling-current type relationship J∝exp($\alpha$V) where $\alpha$ was constant independent of temperature at the high forward bias voltage. The crystallite size of ZnO films were influenced largely on the photovoltaic properties of diodes ; The diodes with the films of the larger crystallites showed the poor photovoltaic properties. This reason may be cosidered that the ZnO films with the large crystallites could not grow to the electrically continuous films because the thickness of films was so thin in this experiment.

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Fabrication and Electrical Transport Characteristics of All-Perovskite Oxide DyMnO3/Nb-1.0 wt% Doped SrTiO3 Heterostructures

  • Wang, Wei Tian
    • 한국재료학회지
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    • 제30권7호
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    • pp.333-337
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    • 2020
  • Orthorhombic DyMnO3 films are fabricated epitaxially on Nb-1.0 wt%-doped SrTiO3 single crystal substrates using pulsed laser deposition technique. The structure of the deposited DyMnO3 films is studied by X-ray diffraction, and the epitaxial relationship between the film and the substrate is determined. The electrical transport properties reveal the diodelike rectifying behaviors in the all-perovskite oxide junctions over a wide temperature range (100 ~ 340 K). The forward current is exponentially related to the forward bias voltage, and the extracted ideality factors show distinct transport mechanisms in high and low positive regions. The leakage current increases with increasing reverse bias voltage, and the breakdown voltage decreases with decrease temperature, a consequence of tunneling effects because the leakage current at low temperature is larger than that at high temperature. The determined built-in potentials are 0.37 V in the low bias region, and 0.11 V in the high bias region, respectively. The results show the importance of temperature and applied bias in determining the electrical transport characteristics of all-perovskite oxide heterostructures.

Fabrication of a Hydrogenated a-Si Photodiode

  • Hur, Chang-Wu
    • Journal of information and communication convergence engineering
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    • 제1권1호
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    • pp.23-26
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    • 2003
  • A photodiode capable of obtaining a sufficient photo/dark current ratio at both a forward bias state and a reverse bias state is proposed. The photodiode includes a glass substrate, an aluminum film formed as a lower electrode over the glass substrate, an alumina film formed as a schottky barrier over the aluminum film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the alumina film, and a transparent conduction film formed as an upper electrode over the hydro-generated amorphous silicon film. Growth of high quality alumina($Al_{2}O_{3}$) film using anodizing technology is proposed and analyzed by experiment. We have obtained the film with a superior characteristics

ISL 게이트에서 측정과 시뮬레이션의 결과 비교 (The Results Comparison of Measurement and Simulations in ISL(Integrated Schottky Logic) Gate)

  • 이용재
    • 한국정보통신학회논문지
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    • 제5권1호
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    • pp.157-165
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    • 2001
  • 집적 쇼트키 논리 게이트에서 전압 스윙을 크게 하기 위해서 백금 실리사이드 쇼트키 접합의 전기직 특성을 분석하였고, 이 접합에서 프로그램으로 특성을 시뮬레이션 하였다. 분석특성 특성을 위한 시뮬레이션 프로그램은 제조 공정용 SUPREM V와 모델링용 Matlab, 소자 구조용의 Medichi 툴이다. 시뮬레이션 특성을 위한 입력 파라미터는 소자 제작 공정의 공정 단계와 동일한 조건으로 하였다. 분석적인 전기적인 특성들은 순방향 바이어스에서 턴-온 전압, 포화 전류, 이상인자이고, 역방향 바이어스에서 항복 전압을 실제 특성과 시뮬레이션 특성 사이의 결과를 보였다. 결과로써 순방향 턴-온 전압, 역방향 항복전압, 장벽 높이는 기판의 증가된 농도의 변화에 따라 감소되었지만, 포화전류와 이상인자는 증가되었다.

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Power Semiconductor SMD Package Embedded in Multilayered Ceramic for Low Switching Loss

  • Jung, Dong Yun;Jang, Hyun Gyu;Kim, Minki;Jun, Chi-Hoon;Park, Junbo;Lee, Hyun-Soo;Park, Jong Moon;Ko, Sang Choon
    • ETRI Journal
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    • 제39권6호
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    • pp.866-873
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    • 2017
  • We propose a multilayered-substrate-based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost-effective, low-temperature co-fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high-temperature storage life and temperature humidity bias. At $175^{\circ}C$, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 lA up to a reverse voltage of 980 V. The measured maximum reverse current ($I_{RM}$), reverse recovery time ($T_{rr}$), and reverse recovery charge ($Q_{rr}$) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to $300A/{\mu}s$.

레이저 열처리된 다결정 실리콘 기판을 이용한 소트키 다이오드의 제작 및 그 전기적 특성에 관한 연구 (A study on the fabrication and its electrical characteristics of the schottky diodes on the laser anneled poly-si substrate)

  • 김재영;강문상;구용서;안철
    • 전자공학회논문지A
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    • 제33A권4호
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    • pp.106-111
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    • 1996
  • Schottky diodes are fabricated on laser annealed and unannealed polysilicon substrate and their electrical characteristics are studied and analyzed. Current of laser annealed devices are larger than that of unannealed devices because of grain growth, decrease of grain boundary and trap density, lowering of grain boundary barrier height, decrease of dopant segregation. At low forward bias (<0.7V), currents of unanealed devices are larger. Soft breakdown voltages of laser annealed devices are larger than that of unannealed devices.

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a-Si:H Photodiode Using Alumina Thin Film Barrier

  • Hur Chang-Wu;Dimitrijev Sima
    • Journal of information and communication convergence engineering
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    • 제3권4호
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    • pp.179-183
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    • 2005
  • A photodiode capable of obtaining a sufficient photo/ dark current ratio at both forward bias state and reverse bias state is proposed. The photodiode includes a glass substrate, an aluminum film formed as a lower electrode over the glass substrate, an alumina film formed as an insulator barrier over the aluminum film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the alumina film, and a transparent conduction film formed as an upper electrode over the hydro-generated amorphous silicon film. A good quality alumina $(Al_2O_3)$ film is formed by oxidation of aluminum film using electrolyte solution of succinic acid. Alumina is used as a potential barrier between amorphous silicon and aluminum. It controls dark-current restriction. In case of photodiodes made by changing the formation condition of alumina, we can obtain a stable dark current $(\~10^{-12}A)$ in alumina thickness below $1000{\AA}$. At the reverse bias state of the negative voltage in ITO (Indium Tin Oxide), the photo current has substantially constant value of $5{\times}10^{-9}$ A at light scan of 100 1x. On the other hand, the photo/dark current ratios become higher at smaller thicknesses of the alumina film. Therefore, the alumina film is used as a thin insulator barrier, which is distinct from the conventional concept of forming the insulator barrier layer near the transparent conduction film. Also, the structure with the insulator thin barrier layer formed near the lower electrode, opposed to the ITO film, solves the interface problem of the ITO film because it provides an improved photo current/dark current ratio.

코발트 실리사이드 접합을 사용하는 0.15${\mu}{\textrm}{m}$ CMOS Technology에서 얕은 접합에서의 누설 전류 특성 분석과 실리사이드에 의해 발생된 Schottky Contact 면적의 유도 (Characterization of Reverse Leakage Current Mechanism of Shallow Junction and Extraction of Silicidation Induced Schottky Contact Area for 0.15 ${\mu}{\textrm}{m}$ CMOS Technology Utilizing Cobalt Silicide)

  • 강근구;장명준;이원창;이희덕
    • 대한전자공학회논문지SD
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    • 제39권10호
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    • pp.25-34
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    • 2002
  • 본 논문에서는 코발트 실리사이드가 형성된 얕은 p+-n과 n+-p 접합의 전류-전압 특성을 분석하여 silicidation에 의해 형성된 Schottky contact 면적을 구하였다. 역방향 바이어스 영역에서는 Poole-Frenkel barrier lowering 효과가 지배적으로 나타나서 Schottky contact 효과를 파악하기가 어려웠다. 그러나 Schottky contact의 형성은 순방향 바이어스 영역에서 n+-p 접합의 전류-전압 (I-V) 동작에 영향을 미치는 것으로 확인되었다. 실리사이드가 형성된 n+-p 다이오드의 누설전류 증가는 실리사이드가 형성될 때 p-substrate또는 depletion area로 코발트가 침투퇴어 Schottky contact을 형성하거나 trap들을 발생시켰기 때문이다. 분석결과 perimeter intensive diode인 경우에는 silicide가 junction area까지 침투하였으며, area intensive junction인 경우에는 silicide가 비록 공핍층이나 p-substrate까지 침투하지는 않았더라도 공핍층 근처까지 침투하여 trap들을 발생시켜 누설전류를 증가시킴을 확인하였다. 반면 p+-n 다이오드의 경우 Schottky contact이발생하지 않았고 따라서 누설전류도 증가하지 않았다. n+-p 다이오드에서 실리사이드에 의해 형성된 Schottky contact 면적은 순방향 바이어스와 역방향 바이어스의 전류 전압특성을 동시에 제시하여 유도할 수 있었고 전체 접합면적의 0.01%보다 작게 분석되었다.