• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.11
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• pp.42-48
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• 1990

In this paper robust test generation for stuck-open faults in CMOS circuits is proposed. By obtaining initialization patterns and test patterns using the relationship of bit position and Hamming weight among input vectors for CMOS circuit test generation time for stuck-open faults can be reduced, and the problem of input transition skew which make fault detection difficult is solved, and the number of test sequences are minimized. Also the number of test sequences is reduced by arranging test sequences using Hamming distance between initialization patterns and test patterns for circuit.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.7
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• pp.1118-1127
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• 1990

In this paper a new test generation method for Domino CMOS logic circuits is proposed. Because the stuck-at type fault is not adequate for Domino CMOS circuits the stuck-open fault, stuck-on fault and bridging fault are considered as fault models. It is shown that the test generation problem of Domino CMOS circuits results in functional block test generation problem. Test set is generated by using the logic minimizer which is a part of logic design system. An algorithm for reduction of test set is described. The proposed test method can be easily applied to various figures of circuits and make it easy to construct automatic test generator in design system. The proposed algorithms are programed and their efficiency is confirmed by examples.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.2
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• pp.63-75
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• 1993

As the CMOS technology becomes the most dominant circuit realization method, the cost problem for the test which includes both the transistor-level FET stuck-on and stuck-off faults and the gatelevel stuck-at faults becomes more and more serious. In accordance, this paper proposes a test set and its generation algorithm, which handles both the transistor-level faults and the gate-level faults, thus can unify the test steps during the IC design and fabrication procedure. This algorithm uses only the logic equation of the given logic function as the input resource without referring the transistor of gate circuit. Also, the resultant test set from this algorithm can improve in both the complexity of the generation algorithm and the time to apply the test as well as unify the test steps in comparing the existing methods.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.218-221
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• 2000

The electronystagmography(ENG) means to measure and record CRP(Corneal-Retinal Potential) whenever the eyeball is moved by using a skin electrode stuck to the hi-temporal and the difference of CRP. Both the horizontal and vertical movement are known according to the position of the stuck skin electrode. In this paper, the variable time-constances to record the eyeball signal of the conventional EOG(Electro-Oculograph) Amplifier is chosen. The shorter the time-constance is, the worse the distortion of a signal is. But the unbalanced impedance of the electrode stuck on the hi-temporal is reduced. Also, the longer the time-constance is, the less the distortion of it signal is. But it is sensitive to the change of base line according to the unbalanced impedance. In order to solve these problems, an DC-Amplifier, the distortion of the eyeball signal is globally used. By solving unbalanced impedance problem of EOG amplifier, the distortion ratio of EOG amplifier is improved.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.3
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• pp.79-89
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• 1998

The Error Back-Propagation(EBP) algorithm is widely applied to train a multi-layer perceptron, which is a neural network model frequently used to solve complex problems such as pattern recognition, adaptive control, and global optimization. However, the EBP is basically a gradient descent method, which may get stuck in a local minimum, leading to failure in finding the globally optimal solution. Moreover, a multi-layer perceptron suffers from locking a systematic determination of the network structure appropriate for a given problem. It is usually the case to determine the number of hidden nodes by trial and error. In this paper, we propose a new algorithm to efficiently train a multi-layer perceptron. OUr algorithm uses stochastic perturbation in the weight space to effectively escape from local minima in multi-layer perceptron learning. Stochastic perturbation probabilistically re-initializes weights associated with hidden nodes to escape a local minimum if the probabilistically re-initializes weights associated with hidden nodes to escape a local minimum if the EGP learning gets stuck to it. Addition of new hidden nodes also can be viewed asa special case of stochastic perturbation. Using stochastic perturbation we can solve the local minima problem and the network structure design in a unified way. The results of our experiments with several benchmark test problems including theparity problem, the two-spirals problem, andthe credit-screening data show that our algorithm is very efficient.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.1
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• pp.7-12
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• 2003

The purpose of testability analysis is to estimate the difficulty of testing a stuck-at fault in logic circuits. A good testability measurement can give an early warning about the testing problem so as to provide guidance in improving the testability of a circuit. There have been researches attempting to efficiently compute the testability analysis. Conventional testability measurements, such as COP and SCOAP, can calculate the testability value of a stuck-at fault efficiently in a tree-structured circuit but may be very inaccurate for a general circuit. The inaccuracy is due to the ignorance of signal correlations for making the testability analysis linear to a circuit size. This paper proposes an efficient method for computing testability analysis, which takes into account signal correlation to obtain more accurate testability. The proposed method includes the algorithm for identifying all reconvergent fanouts in a given n circuit and the gates reachable from them, by which information related to signal correlation is gathered.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.10
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• pp.29-39
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• 2008

Greedy routing which is easy to apply to geographic wireless sensor networks is frequently used. Greedy routing works well in dense networks whereas in sparse networks it may fail. When greedy routing fails, it needs a recovery algorithm to get out of the communication void. However, additional recovery algorithm causes problems that increase both the amount of packet transmission and energy consumption. Communication void is a condition where all neighbor nodes are further away from the destination than the node currently holding a packet and it therefore cannot forward a packet using greedy forwarding. Therefore we propose a VODUA(Virtually Ordered Distance Upgrade Algorithm) as a novel idea to improve and solve the problem of void. In VODUA, nodes exchange routing graphs that indicate information of connection among the nodes and if there exist a stuck node that cannot forward packets, it is terminated using Distance Cost(DC). In this study, we indicate that packets reach successfully their destination while avoiding void through upgrading of DC. We designed the VODUA algorithm to find valid routes through faster delivery and less energy consumption without requirement for an additional recovery algorithm. Moreover, by using VODUA, a network can be adapted rapidly to node's failure or topological change. This is because the algorithm utilizes information of single hop instead of topological information of entire network. Simulation results show that VODUA can deliver packets from source node to destination with shorter time and less hops than other pre-existing algorithms like GPSR and DUA.

• 제어로봇시스템학회:학술대회논문집
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• 1994.10a
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• pp.21-29
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• 1994

This paper presents a method to accommodate failures that affect aircraft dynamical characteristics, especially control surface jams on a large transport aircraft. The approach is to use the slow effectors, such as the stabilators or engines, in the feedforward manner. The simulation results indicate the performance of the RFCS. In some cases of control surface jam, the aircraft cannot recover without using the stabilators. Although the inputs to the slow effectors are determined using the nominal parameters, the effects of parameter change can be compensated by adjusting the control parameters for the fast surfaces. In the case of rudder jam, if the remaining control surfaces and the differential thrust cancel the moments produced by the stuck rudder, using the engine control improves time responses and reduces deflection angles of the control surfaces. If not, however, the aircraft starts a large rolling motion following a yawing motion. In that case, the stabilators should be used to damp the induced rolliig motion, instead of trying to directly cancel the moments caused by the stuck rudder. Unfortunately, the proposed control law for the stabilators does not give such inputs, because it does not take into account the dynamical effects which stuck surfaces have on the aircraft motions. However, we have shown through simulation that the aircraft can be recovered by giving the stabilators the control inputs that counteract the induced rolling moment. Besides, the method has also been shown through simulation to be effective in maintaining control during a situation similar to an actual accident. Finally let us mention a problem with the RFCS. As stated above, we have not established a method to select a trim point which call be reached as easily as possible using the remaining control effectors. In fact, recovery performance considerably depends on the trim states. As pointed out in Ref. 11, finding the best trim point for impaired aircraft will be one of the most difficult questions in RFCS design.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.73-79
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• 2011

This paper describes a reset-free delay-locked loop (DLL) for a memory controller application, with the aid of a hysteresis coarse lock detector. The coarse lock loop in the proposed DLL adjusts the delay between input and output clock within the pull-in range of the main loop phase detector. In addition, it monitors the main loop's lock status by dividing the input clock and counting its multiphase edges. Moreover, by using hysteresis, it controls the coarse lock range, thus reduces jitter. The proposed DLL neither suffers from harmonic lock and stuck problems nor needs an external reset or start-up signal. In a 0.13-${\mu}m$ CMOS process, post-layout simulation demonstrates that, even with a switching supply noise, the peak-to-peak jitter is less than 30 ps over the operating range of 500-1200 MHz. It occupies 0.04 $mm^2$ and dissipates 16.6 mW at 1.2 GHz.

• Nuclear Engineering and Technology
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• v.49 no.6
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• pp.1358-1367
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• 2017

The data integration with modeled predictions (DIMP) model is a promising inverse radiation transport method for solving the special nuclear material (SNM) holdup problem. Unlike previous methods, DIMP is a completely passive nondestructive assay technique that requires no initial assumptions regarding the source distribution or active measurement time. DIMP predicts the most probable source location and distribution through Bayesian inference and quasi-Newtonian optimization of predicted detector responses (using the adjoint transport solution) with measured responses. DIMP performs well with forward hemispherical collimation and unshielded measurements, but several considerations are required when using narrow-view collimated detectors. DIMP converged well to the correct source distribution as the number of synthetic responses increased. DIMP also performed well for the first experimental validation exercise after applying a collimation factor, and sufficiently reducing the source search volume's extent to prevent the optimizer from getting stuck in local minima. DIMP's simple point detector response function (DRF) is being improved to address coplanar false positive/negative responses, and an angular DRF is being considered for integration with the next version of DIMP to account for highly collimated responses. Overall, DIMP shows promise for solving the SNM holdup inverse problem, especially once an improved optimization algorithm is implemented.