• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.6
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• pp.67-74
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• 2004

Differently from an existing analog control, because the digital control includes microprocessor basically, the digital control is enable to monitor internal parameters of DC-DC converter and to control output voltage remotely by communicating with a Windows based PC. These things are impossible in an analog control and there are more advantages in a digital control than an analog control. In this paper, with the advantages mentioned above, the feasibility of digital controlled DC-DC converter in low price is proposed. In order to implement these functions, it is used the inexpensive H8/3672 made by Renesas that has built in AD converters and PWM logic generators. The proposed digital controller is applied to a flyback converter that is designed to output DC 5[V] from DC 20∼30[V] and is remotely controlled to make variable outputs from DC 0[V] to 5[V] above in PC. The PWM controller adopts the PD controller in PID. In the last, the response characteristics of a step reference voltage and in a steady state are experimented to verify the feasibility and the usefulness of the proposed flyback converter that is implemented inexpensively.

• Nuclear Medicine and Molecular Imaging
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• v.41 no.6
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• pp.561-565
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• 2007

Purpose: Lipophilic cations including tetraphenylphosphonium (TPP) salts penetrate the hydrophobic barriers of the plasma and mitochondrial membranes, resulting in accumulation in mitochondria in response to the negative inner transmembrane potentials. The development of radiolabeled phosphonium cations as a noninvasive imaging agent may serve as a new molecular "voltage sensor" probe to investigate the role of mitochondria in the pathophysiology and diagnosis of cancer. Materials and Methods: We have synthesized a reference compound (4-fluorophenyl)triphenylphosphonium (TPP) and a labeled compound $[^{18}F]$TPP via two step nucleophilic substitution of no-carrier-added $[^{18}F]$fluoride with the precursor, 4-iodophenyltrimethylammonium iodide, in the presence of Kryptofix-2.2.2 and $K_2CO_3$. Result: The reference compound (4-fluorophenyl)triphenylphosphonium (TPP) was synthesized in 60% yield. The radiolabeled compound $[^{18}F]$TPP was synthesized in $10\sim15%$ yield. The radiochemical purity of the $[^{18}F]$TPP was $95.57{\pm}0.51%$ (n=11). Conclusion: $[^{18}F]$TPP was successfully synthesized that might have a potential to be utilized as a novel myocardial or cancer imaging agent for PET. However, it is required to improve the radiochemical yield to apply $[^{18}F]$TPP in preclinical or clinical researches.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.1
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• pp.56-69
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• 2021

In this paper, the PV system with a link to the commercial system needs some advantages like small capacity, high power factor, high reliability, low harmonic output, maximum power operation of solar cell, and low cost, etc. as well as the properties of inverter. To transfer the PV energy of photovoltaic power generation system to the system and load, it requires PCS in both directions. The purpose of this paper is to confirm the stable power supply through the load leveling by presenting the PCS considering ESS of photovoltaic power generation. In order to achieve these purpose, 5 step process of operation mode algorithm were used according to the solar insolation amount and load capacity and the controller for charging/ discharging control was designed. For bidirectional and effective energy transfer, the bidirectional converter and battery at DC-link stage were connected and the DC-link voltage and inverter output voltage through the interactive inverter were controlled. In order to prove the validity of the suggested system, the simulation using PSIM was performed and were reviewed for its validity and stability. The 3[kW] PCS was manufactured and its test was conducted in order to check this situation. In addition, the system characteristics suggested through the test results was verified and the PCS system presented in this study was excellent and stronger than that of before system.

• Composites Research
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• v.35 no.3
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• pp.127-133
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• 2022

Polypropylene (PP) has been received great attention as a next-generation high-voltage power cable insulation material that can replace cross-linked polyethylene (XLPE). However, the PP cannot be used alone as an insulation material because of its high elastic modulus and vulnerability to impact, and thus is mainly utilized as a form of a copolymer with rubber phases included in the polymerization step. In this paper, a soft PP-based blend was prepared through melt-mixing of impact PP, polyolefin elastomer, and propylene-ethylene random copolymer. The elastic modulus and impact strength of the blend could properly be decreased or increased, respectively, by introducing elastomeric phases. Furthermore, the blends showed a high storage modulus even at a temperature of 100℃ or higher at which the XLPE loses its mechanical properties. In addition, the blend was found to be effective in suppressing the space charge compared to the pristine PP as well as XLPE.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.1
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• pp.44-49
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• 2022

In this paper, we investigated current (I)- and voltage (V)-sweeping properties in a double-stack structure, Ge₂Sb₂Te₅/Ti/W-doped Ge₈Sb₂Te₁₁, a candidate medium for applications to multilevel phase-change memory. 200-nm-thick and W-doped Ge₂Sb₂Te₅ and W-doped Ge₈Sb₂Te₁₁ films were deposited on p-type Si(100) substrate using magnetron sputtering system, and the sheet resistance was measured using 4 point-probe method. The sheet resistance of amorphous-phase W-doped Ge₈Sb₂Te₁₁ film was about 1 order larger than that of Ge₂Sb₂Te₅ film. The I- and V-sweeping properties were measured using sourcemeter, pulse generator, and digital multimeter. The speed of amorphous-to-multilevel crystallization was evaluated from a graph of resistance vs. pulse duration (t) at a fixed applied voltage (12 V). All the double-stack cells exhibited a two-step phase change process with the multilevel memory states of high-middle-low resistance (HR-MR-LR). In particular, the stable MR state is required to guarantee the reliability of the multilevel phase-change memory. For the Ge₂Sb₂Te₅ (150 nm)/Ti (20 nm)/W-Ge₈Sb₂Te₁₁ (50 nm), the phase transformations of HR→MR and MR→LR were observed at t<30ns and t<65ns, respectively. We believe that a high speed and stable multilevel phase-change memory can be optimized by the double-stack structure of proper Ge-Sb-Te films separated by a barrier metal (Ti).

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.283-287
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• 2017

Recently, Ni-InGaAs has been required for high-performance III-V MOSFETs as a promising self-aligned material for doped source/drain region. As downscaling of device proceeds, reduction of contact resistance ($R_c$) between Ni-InGaAs and n-InGaAs has become a challenge for higher performance of MOSFETs. In this paper, we compared three types of sample, vacuum, 2% $H_2$ and 4% $H_2$ annealing condition in rapid thermal annealing (RTA) step, to verify the reduction of $R_c$ at Ni-InGaAs/n-InGaAs interface. Current-voltage (I-V) characteristic of metal-semiconductor contact indicated the lowest $R_c$ in 4% $H_2$ sample, that is, higher current for 4% $H_2$ sample than other samples. The result of this work could be useful for performance improvement of InGaAs n-MOSFETs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.6
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• pp.393-400
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• 2017

For comparison to the Li-ion battery, evaluating a thermal battery must consider additional variables. The first one is the temperature difference between the battery and its unit cell. Thermal batteries and their unit cells have a temperature difference that is caused by the thermal battery activation mechanism and its shape. The second variable is the electrochemical reaction steps. Most Li-ion batteries have a constant electrochemical reaction at the electrode, and battery voltage is affected when the concentration of Li ions is changed. However, a thermal battery has several steps in its electrochemical reaction, and each step has a different potential. In this study, we used unit cell discharge tests based on interpolating a 4D lookup table to estimate the performance of a thermal battery. From the test results, we derived an estimation algorithm by interpolating the table, which is queried from specified profile groups. As a result, we found less than a 5 percent difference between estimation and experiment at the 1.3 V cut-off time.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.289.2-289.2
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• 2016

In-Ga-Zn-O(IGZO) receive great attention as a channel material for thin film transistors(TFTs) as next-generation display panel backplanes due to its superior electrical and physical properties such as a high mobility, low off-current, high sub-threshold slope, flexibility, and optical transparency. For the purpose of fabricating high performance IGZO TFTs, a thermal recovery process above a temperature of $300^{\circ}C$ is required for recovery or rearrangement of the ionic bonding structure. However diffused metal atoms from source/drain(S/D) electrodes increase the channel conductivity through the oxidation of diffused atoms and reduction of $In_2O_3$ during the thermal recovery process. Threshold voltage ($V_{TH}$) shift, one of the electrical instability, restricts actual applications of IGZO TFTs. Therefore, additional investigation of the electrical stability of IGZO TFTs is required. In this paper, we demonstrate the effect of Ti diffusion and modulation of interface traps by carrying out an annealing process on IGZO. In order to investigate the effect of diffused Ti atoms from the S/D electrode, we use secondary ion mass spectroscopy (SIMS), X-ray photoelectron spectroscopy, HSC chemistry simulation, and electrical measurements. By thermal annealing process, we demonstrate VTH shift as a function of the channel length and the gate stress. Furthermore, we enhance the electrical stability of the IGZO TFTs through a second thermal annealing process performed at temperature $50^{\circ}C$ lower than the first annealing step to diffuse Ti atoms in the lateral direction with minimal effects on the channel conductivity.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.347.1-347.1
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• 2016

Screen printing is commonly used to form the electrode for crystalline silicon solar cells. However, it has caused high resistance and low aspect ratio, resulting in decrease of conversion efficiency. Accordingly, Ni/Cu/Ag plating method could be applied for crystalline silicon solar cells to reduce contact resistance. For Ni/Cu/Ag plating, laser ablation process is required to remove anti-reflection layers prior to the plating process, but laser ablation results in surface damage and then decrease of open-circuit voltage and cell efficiency. Another issue with plating process is ghost plating. Ghost plating occurred in the non-metallized region, resulting from pin-hole in anti-reflection layer. In this paper, we investigated the effect of Ni/Cu/Ag plating on the electrical properties, compared to screen printing method. In addition, phosphoric acid layer was spin-coated prior to laser ablation to minimize emitter damage by the laser. Phosphorous elements in phosphoric acid generated selective emitter throughout emitter layer during laser process. Then, KOH treatment was applied to remove surface damage by laser. At this step, amorphous silicon formed by laser ablation was recrystallized during firing process and remaining of amorphous silicon was removed by KOH treatment. As a result, electrical properties as Jsc, FF and efficiency were improved, but Voc was lower than screen printed solar cells because Voc was decreased due to surface damage by laser process. Accordingly, we expect that efficiency of solar cells could be improved by optimization of the process to remove surface damage.

• Applied Microscopy
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• v.25 no.2
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• pp.73-79
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• 1995

The oxidation of silicon wafers is an essential step in the fabrication of semiconductor devices. It is known to induce degradation of electrical properties and lattice strain of Si substrate from thermal oxidation process due to charged interface and thermal expansion mismatch from thermally grown SiO, film. In this study, convergent beam electron diffraction technique is employed to directly measure the lattice strains in Si(100) and $4^{\circ}$ - off Si(100) substrates with thermally grown oxide layer at $1200^{\circ}C$ for three hours. The ratios of {773}-{973}/{773}-{953} Higher Order Laue Zone lines were used at [012] zone axis orientation. Lattice parameters of the Si substrate as a function of distance from the interface were determined from the computer simulation of diffraction patterns. Correction value for the accelerating voltage was 0.2kV for the kinematic simulation of the [012]. HOLZ patterns. The change in the lattice strain profile before and after removal of oxide films revealed the magnitudes of intrinsic strain and thermal strain components. It was shown that $4^{\circ}$ -off Si(100) had much lower intrinsic strain as surface steps provide effective sinks for the free Si atoms produced during thermal oxidation. Thermal strain in the Si substrate was in compression very close to the interface and high concentration of Si interstitials appeared to modify the thermal expansion coefficient of Si.