• Journal of IKEEE
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• v.2 no.2 s.3
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• pp.278-284
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• 1998

This paper describes a l0b CMOS A/D converter (ADC) for HDTV applications. The proposed ADC adopts a typical multi-step pipelined architecture. The proposed circuit design techniques are as fo1lows: A selective channel-length adjustment technique for a bias circuit minimizes the mismatch of the bias current due to the short channel effect by supply voltage variations. A power reduction technique for a high-speed two-stage operational amplifier decreases the power consumption of amplifiers with wide bandwidths by turning on and off bias currents in the suggested sequence. A typical capacitor scaling technique optimizes the chip area and power dissipation of the ADC. The proposed ADC is designed and fabricated in s 0.8 um double-poly double-metal n-well CMOS technology. The measured differential and integral nonlinearities of the prototype ADC show less than ${\pm}0.6LSB\;and\;{\pm}2.0LSB$, respectively. The typical ADC power consumption is 119 mW at 3 V with a 40 MHz sampling rate, and 320 mW at 5 V with a 50 MHz sampling rate.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.4
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• pp.16-24
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• 2002

This work describes a 10b 120 MSample/s CMOS pipelined A/D converter(ADC) based on a merged-capacitor switching(MCS) technique for high signal processing speed and high resolution. The proposed ADC adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area, and employs a MCS technique which improves sampling rate and resolution reducing the number of unit capacitor used in the multiplying digital-to-analog converter (MDAC). The proposed ADC is designed and implemented in a 0.25 um double-poly five-metal n-well CMOS technology. The measured differential and integral nonlinearities are within ${\pm}$0.40 LSB and ${\pm}$0.48 LSB, respectively. The prototype silicon exhibits the signal-to-noise-and-distortion ratio(SNDR) of 58 dB and 53 dB at 100 MSample/s and 120 MSample/s, respectively. The ADC maintains SNDR over 54 dB and the spurious-free dynamic range(SFDR) over 68 dB for input frequencies up to the Nyquist frequency at 100 MSample/s. The active chip area is 3.6 $mm^2$(＝ 1.8 mm ${\times}$ 2.0 mm) and the chip consumes 208 mW at 120 MSample/s.

• International Journal of Aeronautical and Space Sciences
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• v.8 no.1
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• pp.10-20
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• 2007

For spacecraft attitude control, reaction wheel (RW) steering laws with more than three wheels for three-axis attitude control can be derived by using a control allocation (CA) approach.1-2 The CA technique deals with a problem of distributing a given control demand to available sets of actuators.3-4 There are many references for CA with applications to aerospace systems. For spacecraft, the control torque command for three body-fixed reference frames can be constructed by a combination of multiple wheels, usually four-wheel pyramid sets. Multi-wheel configurations can be exploited to satisfy a body-axis control torque requirement while satisfying objectives such as minimum control energy.1-2 In general, the reaction wheel steering laws determine required torque command for each wheel in the form of matrix pseudo-inverse. In general, the attitude control command is generated in the form of a feedback control. The spacecraft body angular rate measured by gyros is used to estimate angular displacement also.⁵ Combination of the body angular rate and attitude parameters such as quaternion and MRPs(Modified Rodrigues Parameters) is typically used in synthesizing the control command which should be produced by RWs.¹ The attitude sensor signals are usually corrupted by noise; gyros tend to contain errors such as drift and random noise. The attitude determination system can estimate such errors, and provide best true signals for feedback control.⁶ Even if the attitude determination system, for instance, sophisticated algorithm such as the EKF(Extended Kalman Filter) algorithm⁶, can eliminate the errors efficiently, it is quite probable that the control command still contains noise sources. The noise and/or other high frequency components in the control command would cause the wheel speed to change in an undesirable manner. The closed-loop system, governed by the feedback control law, is also directly affected by the noise due to imperfect sensor characteristics. The noise components in the sensor signal should be mitigated so that the control command is isolated from the noise effect. This can be done by adding a filter to the sensor output or preventing rapid change in the control command. Dynamic control allocation(DCA), recently studied by Härkegård, is to distribute the control command in the sense of dynamics⁴: the allocation is made over a certain time interval, not a fixed time instant. The dynamic behavior of the control command is taken into account in the course of distributing the control command. Not only the control command requirement, but also variation of the control command over a sampling interval is included in the performance criterion to be optimized. The result is a control command in the form of a finite difference equation over the given time interval.⁴ It results in a filter dynamics by taking the previous control command into account for the synthesis of current control command. Stability of the proposed dynamic control allocation (CA) approach was proved to ensure the control command is bounded at the steady-state. In this study, we extended the results presented in Ref. 4 by adding a two-step dynamic CA term in deriving the control allocation law. Also, the strict equality constraint, between the virtual and actual control inputs, is relaxed in order to construct control command with a smooth profile. The proposed DCA technique is applied to a spacecraft attitude control problem. The sensor noise and/or irregular signals, which are existent in most of spacecraft attitude sensors, can be handled effectively by the proposed approach.

• Journal of Broadcast Engineering
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• v.17 no.5
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• pp.742-755
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• 2012

In this paper, we propose a parallel deblocking algorithm to resolve workload imbalance when the deblocking filter of high efficiency video coding (HEVC) decoder is parallelized. In HEVC, the deblocking filter which is one of the in-loop filters conducts two-step filtering on vertical edges first and horizontal edges later. The deblocking filtering can be conducted with high-speed through data-level parallelism because there is no dependency between adjacent edges for deblocking filtering processes. However, workloads would be imbalanced among regions even though the same amount of data for each region is allocated, which causes performance loss of decoder parallelization. In this paper, we solve the problem for workload imbalance by predicting the complexity of deblocking filtering with coding unit (CU) depth information at a coding tree block (CTB) and by allocating the same amount of workload to each core. Experimental results show that the proposed method achieves average time saving (ATS) by 64.3%, compared to single core-based deblocking filtering and also achieves ATS by 6.7% on average and 13.5% on maximum, compared to the conventional uniform data-level parallelism.

• Journal of Bio-Environment Control
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• v.15 no.4
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• pp.289-295
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• 2006

A computational fluid dynamics (CFD) numerical model has been developed to effectively study the ventilation efficiency of multi-span greenhouses with internal crops. As the first step of the study, the internal plants of the CFD model had to be designed as a porous media because of the complexity of its physical shapes. In this paper, the results of the wind tunnel tests were introduced to find the aerodynamic resistance of the plant canopy. The Seogun tomato was used for this study which made significant effects on thermal and mass exchanges with the adjacent air as well as internal airflow resistance. With the main factors of wind speed, static pressure, and density of plant canopy, the aerodynamic resistance factor was statically found. It was finally found to be 0.26 which will be used later as an input data of the CFD model. Moreover, the experimental procedure of how to find the aerodynamic resistance of various plants using, wind tunnel was established through this study.

• Journal of Life Science
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• v.19 no.10
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• pp.1368-1373
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• 2009

The purpose of this study was to assess the influence of waist size on the reliability and validity of pedometers to count steps in children and youth. The participants for this study were 20 children and youth, composed of 14 Hispanic and 6 Caucasian children. Ten children and youth had waist circumferences greater than the $85^{th}$ percentile (Body Mass Index (BMI)=$28.91\pm3.07$), and 10 children and youth had waist circumferences smaller than the $50^{th}$ percentile (BMI=$18.05\pm1.55$). To examine pedometer reliability, each child completed 3 ascent and descent trials up a set of 15 stairs while wearing a Yamax SW-701 pedometer. The main effect of trials was not statistically significant for the stair ascent trials F (2, 36)=2.575 or for the descent trials F (2, 36)=0.235. The trial by group interaction was also not statistically significant. To examine the influence of waist circumference on the validity of the pedometer in counting walking steps at a self-selected walking pace, the children and youth in the two groups completed a 400-m course. The main effect on the groups was statistically significant, F (1, 18)=7.489. The main effect of counting techniques was not statistically significant, F (1, 18)=2.983 (hand-counted vs. pedometer counted). Overall, the trial and trial by group interaction comparisons for the 400-m walk were not statistically significant, suggesting that the pedometer was equally valid as a tool for assessing walking steps in high waist circumference (HWC) and low waist circumference (LWC) in children and youth.

• Journal of the Korean Society of Marine Environment & Safety
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• v.18 no.5
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• pp.416-422
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• 2012

To prevent serious maritime accident and eliminate the cause of the potential maritime accidents, Maritime Safety Audit Scheme was formally institutionalized through amendment of Maritime Traffic Safety Act(May 27, '09). At the initial step of the enforcement of the law, it has risen the necessity of amending the present institution concerning with the range of applicable business, method of practice, detailed technical standards in the assessment articles, etc. Among them, the assessment of marine traffic congestion has been practiced as a mandatory assessment article, but it is analyzed that the assessment doesn't reflect current variation of ships' size and its speed. By analyzing the status of assessments on marine traffic congestion so far and collecting experts' opinion, this paper suggests draft amendments to improve technical standards on the assessment of marine traffic congestion.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.1-9
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• 2009

A full adders is an important component in applications of digital signal processors and microprocessors. Thus it is imperative to improve the power dissipation and operating speed for designing a full adder. We propose a new adder with modified version of conventional static CMOS and pass transistor logic. The carry-out generation circuit of the proposed full adder is different from the conventional XOR-XNOR structure. The output Cout of module III is generated from input A, B and Cin directly without passing through module I as in conventional structure. Thus output Cout is faster by reducing operation step. The proposed module III uses the static CMOS logic style, which results full-swing operation and good driving capability. The proposed 1bit full adder has the advantages over the conventional static CMOS, CPL, TGA, TFA, HPSC, 14T, and TSAC logic. The delay time is improved by 4.3% comparing to the best value known. PDP(power delay product) is improved by 9.8% comparing to the best value. Simulation has been carried out using a $0.18{\mu}m$ CMOS design rule for simulation purposes. The physical design has been verified using HSPICE.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.5
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• pp.62-70
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• 2007

In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.

• Geophysics and Geophysical Exploration
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• v.7 no.3
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• pp.207-212
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• 2004

This article reviews recent developments in three-dimensional (3-D) magntotelluric (MT) imaging. The inversion of MT data is fundamentally ill-posed, and therefore the resultant solution is non-unique. A regularizing scheme must be involved to reduce the non-uniqueness while retaining certain a priori information in the solution. The standard approach to nonlinear inversion in geophysis has been the Gauss-Newton method, which solves a sequence of linearized inverse problems. When running to convergence, the algorithm minimizes an objective function over the space of models and in the sense produces an optimal solution of the inverse problem. The general usefulness of iterative, linearized inversion algorithms, however is greatly limited in 3-D MT applications by the requirement of computing the Jacobian(partial derivative, sensitivity) matrix of the forward problem. The difficulty may be relaxed using conjugate gradients(CG) methods. A linear CG technique is used to solve each step of Gauss-Newton iterations incompletely, while the method of nonlinear CG is applied directly to the minimization of the objective function. These CG techniques replace computation of jacobian matrix and solution of a large linear system with computations equivalent to only three forward problems per inversion iteration. Consequently, the algorithms are efficient in computational speed and memory requirement, making 3-D inversion feasible.