• Title/Summary/Keyword: source/drain

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Calculating the Sunlight Amount for Buildings Using SAS: A Case Study of Gyeongsan City (그림자 분석 시뮬레이션을 활용한 건축물별 일조량 산정 - 경산시를 사례로)

  • Kim, Do-Ryeong;Kim, Sung-Jae;Han, Soo-Hee;Jo, Myung-Hee
    • Journal of the Korean Association of Geographic Information Studies
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    • v.17 no.1
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    • pp.159-172
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    • 2014
  • As greenhouse gas emissions have been increasing in the world, global warming is being recognized as a cause of the global problems like climate change. This is closely associated the fossil fuels. Thus renewable energy has been brought to the attention of many people as the upcoming alternative energy source to cope with the fossil drain and increased environmental regulations. Especially, the solar energy among renewable energy has drastically increased. In this study, we calculate on daylight ratio about the solar energy for buildings based on digital surface model. The digital surface model was made using the spatial information data. And it was simulated the shadow analysis using SAS. Therefore, it was suitable places to utilize the solar energy in the Gyeongsan city. Consequently, the daylight ratio was considered important factor to select region of the industry of the solar light power generation.

InGaZnO active layer 두께에 따른 thin-film transistor 전기적인 영향

  • U, Chang-Ho;Kim, Yeong-Lee;An, Cheol-Hyeon;Kim, Dong-Chan;Gong, Bo-Hyeon;Bae, Yeong-Suk;Seo, Dong-Gyu;Jo, Hyeong-Gyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.5-5
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    • 2009
  • Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

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Simulation Study on a Quasi Fermi Energy Movement in the Floating Body Region of FITET (Field-induced Inter-band Tunneling Effect Transistor)

  • Song, Seung-Hwan;Kim, Kyung-Rok;Kang, Sang-Woo;Kim, Jin-Ho;Kang, Kwon-Chil;Shin, Hyung-Cheol;Lee, Jong-Duk;Park, Byung-Gook
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.679-682
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    • 2005
  • Negative-differential conductance (NDC) characteristics as well as negative-differential trans-conductance (NDT) characteristics have been observed in the room temperature I-V characteristics of Field-induced Inter-band Tunneling Effect Transistors (FITETs). These characteristics have been explained with inter-band tunneling physics, from which, inter-band tunneling current flows when the energy bands of degenerately doped regions align, and it does not flow when they don't. FITET is an SOI device and the body region is not directly connected to the external terminal. Therefore, Fermi energy in the body region is determined by electrical coupling among four regions - gate, source, drain and substrate. So, a quasi Fermi energy of the majority carriers in the floating body region can be changed by external voltages, and this causes the energy band movements in the body region, which determine whether the energy bands between degenerately doped junctions aligns or not. This is a key point for an explanation of NDT and NDC characteristics. In this paper, a quasi Fermi energy movement in the floating body region of FITET was investigated by a device simulation. This result was applied for the description of relation between quasi Fermi energy in the body region and external gate bias voltage.

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Optimum Design of Junctionless MOSFET Based on Silicon Nanowire Structure and Analysis on Basic RF Characteristics (실리콘 나노 와이어 기반의 무접합 MOSFET의 최적 설계 및 기본적인 고주파 특성 분석)

  • Cha, Seong-Jae;Kim, Kyung-Rok;Park, Byung-Gook;Rang, In-Man
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.10
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    • pp.14-22
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    • 2010
  • The source/channel/drain regions are formed by ion implantation with different dopant types of $n^+/p^{(+)}/n^+$ in the fabrication of the conventional n-type metal-oxide-semiconductor field effect transistor(NMOSFET). In implementing the ultra-small devices with channel length of sub-30 nm, in order to achieve the designed effective channel length accurately, low thermal budget should be considered in the fabrication processes for minimizing the lateral diffusion of dopants although the implanted ions should be activated as completely as possible for higher on-current level. Junctionless (JL) MOSFETs fully capable of the the conventional NMOSFET operations without p-type channel for enlarging the process margin are under researches. In this paper, the optimum design of the JL MOSFET based on silicon nanowire (SNW) structure is carried out by 3-D device simulation and the basic radio frequency (RF) characteristics such as conductance, maximum oscillation frequency($f_{max}$), current gain cut-off frequency($f_T$) for the optimized device. The channel length was 30 run and the design variables were the channel doping concentration and SNW radius. For the optimally designed JL SNW NMOSFET, $f_T$ and $f_{max}$ high as 367.5 GHz and 602.5 GHz could be obtained, respectively, at the operating bias condition $V_{GS}$ = $V_{DS}$ = 1.0 V).

Key Re-distribution Scheme of Dynamic Filtering Utilizing Attack Information for Improving Energy Efficiency in WSNs (무선 센서 네트워크에서 에너지 효율성 향상을 위해 공격정보를 활용한 동적 여과 기법의 키 재분배 기법)

  • Park, Dong-Jin;Cho, Tae-Ho
    • Journal of the Korean Institute of Intelligent Systems
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    • v.26 no.2
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    • pp.113-119
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    • 2016
  • Wireless sensor networks are vulnerable to an adversary due to scarce resources and wireless communication. An adversary can compromise a sensor node and launch a variety of attacks such as false report injection attacks. This attack may cause monetary damage resulting in energy drain by forwarding the false reports and false alarms at the base station. In order to address this problem, a number of en-route filtering schemes has been proposed. Notably, a dynamic en-route filtering scheme can save energy by filtering of the false report. In the key dissemination phase of the existing scheme, the nodes closer to the source node may not have matching keys to detect the false report. Therefore, continuous attacks may result in unnecessary energy wastage. In this paper, we propose a key re-distribution scheme to solve this issue. The proposed scheme early detects the false report injection attacks using initially assigned secret keys in the phase of the key pre-distribution. The experimental results demonstrate the validity of our scheme with energy efficiency of up to 26.63% and filtering capacity up to 15.92% as compared to the existing scheme.

Effects of thickness of GIZO active layer on device performance in oxide thin-film-transistors

  • Woo, C.H.;Jang, G.J.;Kim, Y.H.;Kong, B.H.;Cho, H.K.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.137-137
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    • 2009
  • Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

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Characteristics of amorphous IZTO-based transparent thin film transistors (비정질 IZTO기반의 투명 박막 트렌지스터 특성)

  • Shin, Han-Jae;Lee, Keun-Young;Han, Dong-Cheul;Lee, Do-Kyung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.151-151
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    • 2009
  • Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

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Design of a Highly Linear Broadband Active Antenna Using a Multi-Stage Amplifier (다중 증폭 회로를 이용한 높은 선형 특성을 갖는 광대역 능동 안테나 설계)

  • Lee, Cheol-Soo;Jung, Geoun-Seok;Pack, Jeong-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.11
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    • pp.1193-1203
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    • 2008
  • An active antenna(AA) can have wider bandwidth and more gain with small antenna size than those of passive antennas. However, AA inherently generates thermal noise and spurious signals from an active device. Moreover, the spurious performance of AA is very important in a highly sensitive receiving system since it is located at the front end of the receiving system. In this study, we developed an AA with $100{\sim}500\;MHz$, having the output P1dB higher than 3 dBm and little spurious signals in real environments. To achieve such performance, we designed an AA with 3-stage amplifier using CD(common drain) FET and 2 BJTs. Its electrical performances were simulated using ADS. The measurement results for typical gain, NF, OIP3, VSWR and P1dB in the required frequency band were 9.7 dBi, 10 dB, 14 dBm, 1.7:1 and 3 dBm respectively. They are in good agreement with simulation results. The unwanted spectrum level of the proposed AA is $10{\sim}30\;dB$ lower than that of the antenna with CS(common source) FET configuration at a west suburban area of Seoul, which shows that the proposed AA can be applicable to a highly sensitive receiving system for detecting unknown weak signals mixed with broadcasting and civilian communication signals.

Floating Gate Organic Memory Device with Plasma Polymerized Styrene Thin Film as the Memory Layer (플라즈마 중합된 Styrene 박막을 터널링층으로 활용한 부동게이트형 유기메모리 소자)

  • Kim, Heesung;Lee, Boongjoo;Lee, Sunwoo;Shin, Paikkyun
    • Journal of the Korean Vacuum Society
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    • v.22 no.3
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    • pp.131-137
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    • 2013
  • The thin insulator films for organic memory device were made by the plasma polymerization method using the styrene monomer which was not the wet process but the dry process. For the formation of stable plasma, we make an effort for controlling the monomer with bubbler and circulator system. The thickness of plasma polymerized styrene insulator layer was 430 nm, the thickness of the Au memory layer was 7 nm thickness of plasma polymerized styrene tunneling layer was 30, 60 nm, the thickness of pentacene active layer was 40 nm, the thickness of source and drain electrodes were 50 nm. The I-V characteristics of fabricated memory device got the hysteresis voltage of 45 V at 40/-40 V double sweep measuring conditions. If it compared with the results of previous paper which was the organic memory with the plasma polymerized MMA insulation thin film, this result was greater than 18 V, the improving ratio is 60%. From the paper, styrene indicated a good charge trapping characteristics better than MMA. In the future, we expect to make the organic memory device with plasma polymerized styrene as the memory thin film.

A Study on the Theory of $\frac {1}{f}$ Noise in Electronic Devies (전자소자에서의 $\frac {1}{f}$잡음에 관한 연구)

  • 송명호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.3 no.1
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    • pp.18-25
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    • 1978
  • The 1/f noise spectrum of short-circuited output drain current due to the Shockley-Read-Hal] recombination centers with a single lifetime in homogeneous nondegenerate MOS-field effcte transtors with n-type channel is calculated under the assumptions that the quasi-Fermi level for the carriers in each energy band can not be defined if we include the fluctuation for time varying quantities. and so 1/f noise is a majority carrier effect. Under these assumptions the derived 1/f noise in this paper show some essential features of the 1/f noise in MOS-field effect transistors. That is, it has no lowfrequency plateau and is proportionnal to the channel cross area A and to the driain bias voltage Vd and inversely proportional to the channel length L3 in MOS field effect transistors. This model can explain the discrepancy between the transition frequency of the noise spectrum from 1/f- response to 1/f2 and the frequency corresponding to the relaxation time related to the surface centers in p-n junction diodes. In this paper the results show that the functional form of noise spectrum is greatly influenced by the functional forms of the electron capture probability cn (E) and the relaxation time r (E) for scattering and the case of lattice scattering show to be responsible for the 4 noise in MOS fold effect transistors. So we canconclude that the source of 1/f noise is due to lattice scattering.

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