• 제목/요약/키워드: source/drain

검색결과 578건 처리시간 0.026초

A 2.4 GHz-Band 100 W GaN-HEMT High-Efficiency Power Amplifier for Microwave Heating

  • Nakatani, Keigo;Ishizaki, Toshio
    • Journal of electromagnetic engineering and science
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    • 제15권2호
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    • pp.82-88
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    • 2015
  • The magnetron, a vacuum tube, is currently the usual high-power microwave power source used for microwave heating. However, the oscillating frequency and output power are unstable and noisy due to the low quality of the high-voltage power supply and low Q of the oscillation circuit. A heating system with enhanced reliability and the capability for control of chemical reactions is desired, because microwave absorption efficiency differs greatly depending on the object being heated. Recent studies on microwave high-efficiency power amplifiers have used harmonic processing techniques, such as class-F and inverse class-F. The present study describes a high-efficiency 100 W GaN-HEMT amplifier that uses a harmonic processing technique that shapes the current and voltage waveforms to improve efficiency. The fabricated GaN power amplifier obtained an output power of 50.4 dBm, a drain efficiency of 72.9%, and a power added efficiency (PAE) of 64.0% at 2.45 GHz for continuous wave operation. A prototype microwave heating system was also developed using this GaN power amplifier. Microwaves totaling 400 W are fed from patch antennas mounted on the top and bottom of the microwave chamber. Preliminary heating experiments with this system have just been initiated.

Photoacryl을 게이트 절연층으로 사용한 유기 박막트랜지스터의 전기적 특성에 관한 연구 (A Study on the Electrical Characteristics of Organic Thin Film Transistor using Photoacryl as Gate Dielectric Layer)

  • 김윤명;표상우;김준호;신재훈;김영관;김정수
    • 한국전기전자재료학회논문지
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    • 제15권2호
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    • pp.110-118
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    • 2002
  • Organic thin film transitors(OTFT) are of interest for use in broad area electronic applications. And recently organic electroluminescent devices(OELD) have been intensively investigated for using in full-color flat-panel display. We have fabricated inverted-staggered structure OTFTs at lower temperature using the fused-ring polycyclic aromatic hydrocarbon pentacene as the active eletronic material and photoacryl as the organic gate insulator. The field effect mobility is 0.039∼0.17 ㎠/Vs, on-off current ratio is 10$\^$6/, and threshold voltage is -7V. And here we report the study of driving emitting, Ir(ppy)$_3$, phosphorescent OELD with all organic thin film transistor and investigated its electrical characteristics. The OELD with a structure of ITO/TPD/8% Ir(ooy)$_3$ doped in BCP/BCP/Alq$_3$/Li:Al/Al and OTFT with a structure of inverted-stagged Al(gate electrode)/photoacry(gate insulator)/pentacene(p-type organic semiconductor)/ Au(source-drain electrode) were fabricated on the ITP patterned glass substrate. The electrical characteristics are turn-on voltage of -10V, and maximum luminance of about 90 cd/㎡. Device characteristics were quite different with that of only OELD.

표면 처리한 $SiO_2$를 게이트 절연막으로 하는 박막 트랜지스터의 특성 연구 (A STUDY ON THE ELECTRICAL CHARACTERISTICS OF ORGANIC THIN FILM TRANSISTORS WITH SURFACE-TREATED GATE DIELECTRIC LAYER)

  • 이재혁;이용수;박재훈;최종선;김유진
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 추계학술대회 논문집 학회본부 C
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    • pp.455-457
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    • 2000
  • In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces, where the gate dielectrics were treated by the two methods which are the deposition of Octadecyltrichlorosilane (OTS) on the insulator and rubbing the insulator surface. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-7}$ Torr and at a deposition rate of $0.3{\AA}/sec$. Aluminum and gold were used for the gate and source/drain electrodes. OTS is used as a self-alignment layer between $SiO_2$ and pentacene. The gate dielectric surface was rubbed before pentacene is deposited on the insulator. In order to confirm the changes of the surface morphology the atomic force microscopy (AFM) was utilized. The characteristics of the fabricated TFTs are measured to clarify the effects of the surface treatment.

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PTC 전열시트를 사용한 핀-관 열교환기의 제상 특성에 관한 실험적 연구 (An experimental study of defrosting behaviors on the fin-tube heat exchanger with PTC heating sheet)

  • 지성;이관수
    • 설비공학논문집
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    • 제11권1호
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    • pp.147-155
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    • 1999
  • In this work, the defrosting characteristics of PTC heating sheet used as a defrosting heat source of fin-tube heat exchanger in a refrigerator have been experimentally compared with those of conventional electric heater. It is found that the characteristics of water draining rate with defrosting time show smoothly oscillating pattern when PTC heating sheet is used, and the drained water is completely melted. The defrosting efficiency of the PTC heating sheet is about 75%, which represents about 25% higher than that of the electric heater. A reduction of defrosting time and an increase of defrosting efficiency may be obtained by improving the arrangement of heating elements of the heating sheet. It is shown that the defrosting time of PTC heating sheet increases linearly with the amount of frost, however the defrosting efficiency is nearly constant. In the application to the refrigerating system, one should notice the fact that the defrosting performance of PTC heating sheet may be defraded due to the repeated operations.

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SC1 세척공정을 이용한 고품질 Poly(3,4-ethylenedioxythiophene) 전극 패턴 어레이의 개발 (Development of High-Quality Poly(3,4-ethylenedioxythiophene) Electrode Pattern Array Using SC1 Cleaning Process)

  • 최상일;김원대;김성수
    • 통합자연과학논문집
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    • 제4권4호
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    • pp.311-314
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    • 2011
  • Application of self-assembled monolayers (SAMs) to the fabrication of organic thin film transistor has been recently reported very often since it can help to provide ohmic contact between films as well as to form simple and effective electrode pattern. Accordingly, quality of these ultra-thin films is becoming more imperative. In this study, in order to manufacture a high quality SAM pattern, a hydrophobic alkylsilane monolayer and a hydrophilic aminosilane monolayer were selectively coated on $SiO_2$ surface through the consecutive procedures of a micro-contact printing (${\mu}CP$) and dip-coating methods under extremely dry condition. On a SAM pattern cleaned with SC1 solution immediately after ${\mu}CP$, poly(3,4-ethylenedioxythiophene) (PEDOT) source and drain electrode array were very selectively and nicely vapour phase polymerized. On the other side, on a SC1-untreated SAM pattern, PEDOT array was very poorly polymerized. It strongly suggests that the SC1 cleaning process effectively removes unwanted contaminants on SAM pattern, thereby resulting in very selective growth of PEDOT electrode pattern.

[ 0.1\;μm ] SOI-MOSFET의 적정 채널도핑농도에 관한 시뮬레이션 연구 (Investigation of Optimal Channel Doping Concentration for 0.1\;μm SOI-MOSFET by Process and Device Simulation)

  • 최광수
    • 한국재료학회지
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    • 제18권5호
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    • pp.272-276
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    • 2008
  • In submicron MOSFET devices, maintaining the ratio between the channel length (L) and the channel depth (D) at 3 : 1 or larger is known to be critical in preventing deleterious short-channel effects. In this study, n-type SOI-MOSFETs with a channel length of $0.1\;{\mu}m$ and a Si film thickness (channel depth) of $0.033\;{\mu}m$ (L : D = 3 : 1) were virtually fabricated using a TSUPREM-4 process simulator. To form functioning transistors on the very thin Si film, a protective layer of $0.08\;{\mu}m$-thick surface oxide was deposited prior to the source/drain ion implantation so as to dampen the speed of the incoming As ions. The p-type boron doping concentration of the Si film, in which the device channel is formed, was used as the key variable in the process simulation. The finished devices were electrically tested with a Medici device simulator. The result showed that, for a given channel doping concentration of $1.9{\sim}2.5\;{\times}\;10^{18}\;cm^{-3}$, the threshold voltage was $0.5{\sim}0.7\;V$, and the subthreshold swing was $70{\sim}80\;mV/dec$. These value ranges are all fairly reasonable and should form a 'magic region' in which SOI-MOSFETs run optimally.

무선센서네트워크에서의 에너지 효율적인 재클러스터링 알고리즘 (An Energy Efficient Re-clustering Algorithm in Wireless Sensor Networks)

  • 박혜빈;정진우
    • 한국인터넷방송통신학회논문지
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    • 제15권3호
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    • pp.155-161
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    • 2015
  • 무선 센서 네트워크에서 효율적인 에너지 소비는 매우 중요한 이슈이다. 해당 이슈에 대해서 최근 연구들에서는 클러스터 기반 라우팅 프로토콜들을 해법으로 제시하고 있다. 이러한 프로토콜에서는 클러스터 헤드의 에너지 고갈을 방지하기 위해 재클러스터링이 필요한데, 재클러스터링 과정에서 발생하는 오버헤드도 적지 않다. 지나치게 빈번한 재클러스터링으로 인한 오버헤드를 줄이기 위해서 본 연구에서는 클러스터 헤드와 에너지 임계값의 비교를 통해 재클러스터링의 빈도를 조절하는 알고리즘을 제안하였다. 클러스터 헤드가 에너지 임계값보다 높은 에너지 수준을 가지고 있을 경우 클러스터를 유지하여 재클러스터링으로 인한 오버헤드를 줄였고, 낮을 경우 재클러스터링을 하여, 클러스터 헤드의 수명을 최대한 연장하였다. 제안한 알고리즘을 시뮬레이션을 통해 평가하여 기존 알고리즘 대비 우수한 에너지 효율을 가지는 것을 확인하였다.

A Triple-Band Voltage-Controlled Oscillator Using Two Shunt Right-Handed 4th-Order Resonators

  • Lai, Wen-Cheng;Jang, Sheng-Lyang;Liu, Yi-You;Juang, Miin-Horng
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.506-510
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    • 2016
  • A triple-band (TB) oscillator was implemented in the TSMC $0.18{\mu}m$ 1P6M CMOS process, and it uses a cross-coupled nMOS pair and two shunt $4^{th}$ order LC resonators to form a $6^{th}$ order resonator with three resonant frequencies. The oscillator uses the varactors for band switching and frequency tuning. The core current and power consumption of the high (middle, low)- band core oscillator are 3.59(3.42, 3.4) mA and 2.4(2.29, 2.28) mW, respectively at the dc drain-source bias of 0.67V. The oscillator can generate differential signals in the frequency range of 8.04-8.68 GHz, 5.82-6.15 GHz, and 3.68-4.08 GHz. The die area of the triple-band oscillator is $0.835{\times}1.103mm^2$.

Thermoelectric Seebeck and Peltier effects of single walled carbon nanotube quantum dot nanodevice

  • El-Demsisy, H.A.;Asham, M.D.;Louis, D.S.;Phillips, A.H.
    • Carbon letters
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    • 제21권
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    • pp.8-15
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    • 2017
  • The thermoelectric Seebeck and Peltier effects of a single walled carbon nanotube (SWCNT) quantum dot nanodevice are investigated, taking into consideration a certain value of applied tensile strain and induced ac-field with frequency in the terahertz (THz) range. This device is modeled as a SWCNT quantum dot connected to metallic leads. These two metallic leads operate as a source and a drain. In this three-terminal device, the conducting substance is the gate electrode. Another metallic gate is used to govern the electrostatics and the switching of the carbon nanotube channel. The substances at the carbon nanotube quantum dot/metal contact are controlled by the back gate. Results show that both the Seebeck and Peltier coefficients have random oscillation as a function of gate voltage in the Coulomb blockade regime for all types of SWCNT quantum dots. Also, the values of both the Seebeck and Peltier coefficients are enhanced, mainly due to the induced tensile strain. Results show that the three types of SWCNT quantum dot are good thermoelectric nanodevices for energy harvesting (Seebeck effect) and good coolers for nanoelectronic devices (Peltier effect).

연속전류모드에서 기생손실들을 고려한 고정주파수 LCL형 컨버터 해석 (Analysis of the Fixed Frequency LCL-type Converter at Continuous Current Mode Including Parasitic Losses)

  • 박상은;차한주
    • 전기학회논문지
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    • 제65권5호
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    • pp.785-793
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    • 2016
  • This paper analyzes an LCL-type isolated dc-dc converter operating for constant output voltage in the continuous conduction mode(CCM) with resistances of parasitic losses-static drain-source on resistance of power switch, ESR of resonant network(L-C-L)-using a high loaded quality factor Q assumptions and fourier series techniques. Simple analytical expressions for performance characteristics are derived under steady-state conditions for designing and understanding the behavior of the proposed converter. The voltage-driven rectifier is analyzed, taking into account the diode threshold voltage and the diode forward resistance. Experimental results measured for a proposed converter at low input voltage and various load resistances show agreement to the theoretical performance predicted by the analysis within maximum 4% error. Especially in the case of low output voltages and large loads, It is been observed that introduction of both rectifier and the parasitic components of converter had considerable effect on the performance.