• Title/Summary/Keyword: solid-state disk

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Performance Changes of Solid State Disk with Compressed.Uncompressed File Format and Command Queue Depth (압축/비압축 파일과 명령 큐 깊이에 따른 SSD 성능 변화)

  • Lee, Su-Yeon;Cha, Jae-Hyuk
    • Proceedings of the Korean Information Science Society Conference
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    • 2011.06b
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    • pp.462-465
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    • 2011
  • 낸드 플래시 메모리를 이용한 SSD(Solid-State Disk)는 빠른 속도와 저전력, 휴대성, 내구성 등의 특성을 가져 전통적인 저장 장치인 하드 디스크(HDD:Hard Disk Drive)를 대체할 차세대 저장 장치로 주목받고 있다. 그러나 저장 장치 성능 측정 도구는 기존의 하드 디스크의 특성을 기반으로 한 것들이 대부분으로 이를 통해 SSD의 성능을 측정하기엔 적합하지 않다. 특히 SSD는 하드 디스크에 비해 단위 공간 당비용이 수십 배 가량 높아 저장 공간의 효율적인 관리를 위해 컨트롤러(Controller)가 데이터 압축 기법을 사용하기도 하는데 이 압축 기법을 사용하는 컨트롤러에 따라 SSD는 다른 성능을 보인다. 또, 여러 가지 명령들이 한꺼번에 존재할 때 컨트롤러에 따라 이를 적절히 효율적으로 처리해주는 기능을 가지고 있는데 이 역시 SSD의 성능에 차이를 가져온다. 그러나 기존 저장 장치 성능 측정 도구는 압축 기법 유무를 판별할 수 있으면서 여러 명령들이 한꺼번에 존재할 때 SSD 성능의 차이를 파악할 수 있는 통합된 성능 측정 도구는 없다. 본 논문에서는 다양한 패턴에 따라 SSD의 특성을 측정할 수 있는 도구인 uFlip 성능 측정 도구를 기반으로, 압축 기법의 사용 유무를 판별할 수 있는 기능과 명령 큐 깊이(Command Queue Depth)에 따라 성능의 차이를 판별할 수 있는 기능을 추가하였고, uFlip 기반 수정된 성능 측정 도구로 몇 가지 상용 SSD의 성능을 평가하여 비교함으로써 추가된 기능들의 유무에 따라 SSD별로 다른 성능을 보이는 것을 확인할 수 있었다.

A Transaction Level Simulator for Performance Analysis of Solid-State Disk (SSD) in PC Environment (PC향 SSD의 성능 분석을 위한 트랜잭션 수준 시뮬레이터)

  • Kim, Dong;Bang, Kwan-Hu;Ha, Seung-Hwan;Chung, Sung-Woo;Chung, Eui-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.12
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    • pp.57-64
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    • 2008
  • In this paper, we propose a system-level simulator for the performance analysis of a Solid-State Disk (SSD) in PC environment by using TLM (Transaction Level Modeling) method. Our method provides quantitative analysis for a variety of architectural choices of PC system as well as SSD. Also, it drastically reduces the analysis time compared to the conventional RTL (Register Transfer Level) modeling method. To show the effectiveness of the proposed simulator, we performed several explorations of PC architecture as well as SSD. More specifically, we measured the performance impact of the hit rate of a cache buffer which temporarily stores the data from PC. Also, we analyzed the performance variation of SSD for various NAND Flash memories which show different response time with our simulator. These experimental results show that our simulator can be effectively utilized for the architecture exploration of SSD as well as PC.

A Buffer Architecture based on Dynamic Mapping table for Write Performance of Solid State Disk (동적 사상 테이블 기반의 버퍼구조를 통한 Solid State Disk의 쓰기 성능 향상)

  • Cho, In-Pyo;Ko, So-Hyang;Yang, Hoon-Mo;Park, Gi-Ho;Kim, Shin-Dug
    • The KIPS Transactions:PartA
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    • v.18A no.4
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    • pp.135-142
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    • 2011
  • This research is to design an effective buffer structure and its management for flash memory based high performance SSDs (Solid State Disks). Specifically conventional SSDs tend to show asymmetrical performance in read and /write operations, in addition to a limited number of erase operations. To minimize the number of erase operations and write latency, the degree of interleaving levels over multiple flash memory chips should be maximized. Thus, to increase the interleaving effect, an effective buffer structure is proposed for the SSD with a hybrid address mapping scheme and super-block management. The proposed buffer operation is designed to provide performance improvement and enhanced flash memory life cycle. Also its management is based on a new selection scheme to determine random and sequential accesses, depending on execution characteristics, and a method to enhance the size of sequential access unit by aggressive merging. Experiments show that a newly developed mapping table under the MBA is more efficient than the basic simple management in terms of maintenance and performance. The overall performance is increased by around 35% in comparison with the basic simple management.

A High Performance Flash Memory Solid State Disk (고성능 플래시 메모리 솔리드 스테이트 디스크)

  • Yoon, Jin-Hyuk;Nam, Eyee-Hyun;Seong, Yoon-Jae;Kim, Hong-Seok;Min, Sang-Lyul;Cho, Yoo-Kun
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.4
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    • pp.378-388
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    • 2008
  • Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

Design Optimization Techniques for the SSD Controller (SSD 컨트롤러 최적 설계 기법)

  • Yi, Doo-Jin;Han, Tae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.8
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    • pp.45-52
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    • 2011
  • Flash memory is becoming widely prevalent in various area due to high performance, non-volatile features, low power, and robust durability. As price-per-bit is decreased, NAND flash based SSDs (Solid State Disk) have been attracting attention as the next generation storage device, which can replace HDDs (Hard Disk Drive) which have mechanical properties. Especially for the single package SSD, if channel number or FIFO buffer size per channel increases to improve performance, the size of a controller and I/O pin count will increase linearly with channel numbers and form factor will be affected. We propose a novel technique which can minimize form factor by optimizing the number of NAND flash channels and the size of interface FIFO buffer in the SSD. For SSD with 10 channel and double buffer, the experimental results show that buffer block size can be reduced about 73% without performance degradation and total size of a controller can be reduced about 40% because control block per channel and I/O pin count decrease according to decrease channel number.

A Study on Tribological Properties of Diamond-like Carbon Thin Film for the Application to Solid Lubricant of MEMS Devices (MEMS 소자의 고체윤활박막으로 활용하기 위한 다이아몬드상 카본 박막의 트라이볼로지 특성 분석)

  • Choi, Won-Seok;Hong, Byung-You
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.11
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    • pp.1010-1013
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    • 2006
  • Hydrogenated Diamond-like carbon (DLC) films were Prepared by the radio frequency plasma enhanced chemical vapor deposition (RF PECVD) method on silicon substrates using methane $(CH_4)$ and hydrogen $(H_2)$ gas for the application to solid lubricant of MEMS devices. We have checked the influence of varying RF power on tribological properties of DLC film. We have checked their performance as two kinds of method such as FFM (Friction Force Microscope) and BOD (Ball-on Disk) measurement. The friction coefficients and the contact number of cycles to steady state decreased as the increase of RF power with FFM and BOD measurement, respectively.

Garbage Collection Technique for Balanced Wear-out and Durability Enhancement with Solid State Drive on Storage Systems

  • Kim, Sungho;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.22 no.4
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    • pp.25-32
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    • 2017
  • Recently, the use of NAND flash memory is being increased as a secondary device to displace conventional magnetic disk. NAND flash memory, as one among non-volatile memories, has many advantages such as low power, high reliability, low access latency, and so on. However, NAND flash memory has disadvantages such as erase-before-write, unbalanced operation speed, and limited P/E cycles, unlike conventional magnetic disk. To solve these problems, NAND flash memory mainly adopted FTL (Flash Translation Layer). In particular, garbage collection technique in FTL tried to improve the system lifetime. However, previous garbage collection techniques have a sensitive property of the system lifetime according to write pattern. To solve this problem, we propose BSGC (Balanced Selection-based Garbage Collection) technique. BSGC efficiently selects a victim block using all intervals from the past information to the current information. In this work, SFL (Search First linked List), as the proposed block allocation policy, prolongs the system lifetime additionally. In our experiments, SFL and BSGC prolonged the system lifetime about 12.85% on average and reduced page migrations about 22.12% on average. Moreover, SFL and BSGC reduced the average response time of 16.88% on average.

Development of Large Rotor Shaft for Marine Turbo Charger Using Friction Welding with Dissimilar Materials (마찰용접을 이용한 대형선박 터보챠저용 이종 로타샤프트 개발)

  • Moon, Kwang-Ill;Jeon, Jong-Won;Jeong, Ho-Seung;Cho, Jong-Rae;Choi, Sung-Gyu
    • Journal of the Korean Society for Precision Engineering
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    • v.33 no.4
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    • pp.257-264
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    • 2016
  • Solid state joining techniques are increasingly applied in a wide range of industrial applications. Friction welding is a solid state welding technique that is used to join similar or dissimilar materials. In this study, friction welding was applied to rotor shaft composed of a disk and a shaft. The disk and shaft were manufactured by hot forging and rolling, respectively. The aim of the study was to predict the structural characteristics during hot forging and friction welding process for rotor shaft of turbo charger. The structural characteristics were determined by heat input and heat affected zone (HAZ) during a short cycle time. Thus, transient FE analysis for hot forging and friction welding was based on heat transfer. The results were used to predict structural characteristics during hot forging and friction welding processes. The prototype of rotor shaft was manufactured by the result-based process parameters.