• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 추계학술대회 논문집
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• pp.310-315
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• 2008

Authors design a rotary-type small-scaled linear induction motor(LIM) and a performance test machine before manufacturing a real-scaled LIM for a railway transit. The designed LIM is a single-sided, short primary type and its primary has 4 poles. The rated power is 10(kW). In order to analyze characteristics of the LIM, authors use a mixed 2D-3D FEM analysis. 3-D FEM analysis is used for calculating a distribution of eddy-current on the semi-caped AL-sheet of the secondary reaction. Authors calculate a correction factor of conductivity and an equivalent conductivity on the secondary AL-sheet using a normalized eddy-current. The equivalent conductivity which is calculated in this way includes a transverse edge-effect of the LIM. Authors apply the equivalent conductivity on the secondary AL-sheet of 2D-FEM model and get performance characteristics of the LIM. Basic characteristics such as thrust and normal force, input current, efficiency and power factor of the LIM have been analyzed with the variation of frequency and speed. In order to apply an air-gap control system, the variation of the basic characteristics have been analyzed with the air-gap length variation of the LIM. Finally, authors introduce an operation mode using the air-gap control system and conduct a research on feasibility of the system.

• 센서학회지
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• 제32권4호
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• pp.246-251
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• 2023

Internet of Things (IoT) systems process signals from various sensors using signal processing algorithms suitable for the signal characteristics. To analyze complex signals, these systems usually use signal processing algorithms in the frequency domain, such as fast Fourier transform (FFT), filtering, and short-time Fourier transform (STFT). In this study, we propose a multi-mode sensor signal processor (SSP) accelerator with an FFT-based hardware design. The FFT processor in the proposed SSP is designed with a radix-2 single-path delay feedback (R2SDF) pipeline architecture for high-speed operation. Moreover, based on this FFT processor, the proposed SSP can perform filtering and STFT operation. The proposed SSP is implemented on a field-programmable gate array (FPGA). By sharing the FFT processor for each algorithm, the required hardware resources are significantly reduced. The proposed SSP is implemented and verified on Xilinxh's Zynq Ultrascale+ MPSoC ZCU104 with 53,591 look-up tables (LUTs), 71,451 flip-flops (FFs), and 44 digital signal processors (DSPs). The FFT, filtering, and STFT algorithm implementations on the proposed SSP achieve 185x average acceleration.

• Journal of Power Electronics
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• 제15권5호
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• pp.1217-1226
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• 2015

In a grid-connected photovoltaic (PV) system, the traditional Z-source inverter uses a low frequency transformer to ensure galvanic isolation between the grid and the PV system. In order to combine the advantages of both Z-source inverters and transformerless PV inverters, this paper presents a modified single-phase transformerless Z-source PV grid-connected inverter and a corresponding PWM strategy to eliminate the ground leakage current. By utilizing two reversed-biased diodes, the path for the leakage current is blocked during the shoot-through state. Meanwhile, by turning off an additional switch, the PV array is decoupled from the grid during the freewheeling state. In this paper, the operation principle, PWM strategy and common-mode (CM) characteristic of the modified transformerless Z-source inverter are illustrated. Furthermore, the influence of the junction capacitances of the power switches is analyzed in detail. The total losses of the main electrical components are evaluated and compared. Finally, a theoretical analysis is presented and corroborated by experimental results from a 1-kW laboratory prototype.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.54-57
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• 2002

In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

• 한국광학회지
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• 제5권1호
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• pp.84-89
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• 1994

연속발진 색소레이저를 시드레이저로 하고, Nd:YAG 레이저로 펌핑하는 인젝션 록킹된 단일 모우드 펄스 색소레이저를 제작하였다. 위상민감 검출법으로 얻은 오차신호로 시드빔과 공진 상태를 유지하도록 공진기 길이를 조절하였을 때 99% 이상의 펄스가 시드레이저의 주파수에 록킹 되었다. 이때 레이저 출력빔의 중심 주파수 요동이 10MHz 이내로 안정되었다. 펄스폭(FWHM)은 6ns이고 선폭은 130 MHz이었다. 50mJ로 펌핑하였을 때 2mJ의 출력을 얻었으며 이때의 첨두출력은 0.33 MW이다.

• Journal of Power Electronics
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• 제13권4호
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• pp.592-599
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• 2013

This paper investigates a new isolated single-phase AC-DC converter, which integrates a modified AC-DC buck-boost converter with a DC-DC forward converter. The front semi-stage is operated in discontinuous conduction mode (DCM) to achieve an almost unity power factor and a low total harmonic distortion of the input current. The rear semi-stage is used for step-down voltage conversion and electrical isolation. The front semi-stage uses a coupled inductor with the same winding-turn in the primary and secondary sides, which is charged in series during the switch-on period and is discharged in parallel during the switch-off period. The discharging time can be shortened. In other words, the duty ratio can be extended. This semi-stage can be operated in a larger duty-ratio range than the conventional AC-DC buck-boost converter for DCM operation. Therefore, the proposed converter is suitable for universal input voltage (90~264 $V_{rms}$) and a wide output-power range. Moreover, the voltage stress on the DC-link capacitor is low. Finally, a prototype circuit is implemented to verify the performance of the proposed converter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 B
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• pp.1209-1210
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• 2006

This paper presents a single phase high power factor PWM boost rectifier featuring soft commutat -ion of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing IGBT's. The principle of operation, the theoretical analysis, a design example, and experi -mental results from a laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current THD equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.1169-1171
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• 2003

This paper presents a 1.6[kW]class single phase high power factor(HPF) pulse width modulation(PWM) boost rectifier featuring soft commutation of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing insulated gate bipolar transistors(IGBT'S). The principle of operation, the theoretical analysis, a design example, and experimental results from laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current Total Harmonic Distortion(THD) equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.751-754
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• 2000

When charge-trap SONOS cells are used flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM cells were fabricated using 0.35$\mu\textrm{m}$ standard memory cell embedded logic process including the ONO cell process. based on retrograde twin-well, single-poly, single metal CMOS process. The thickness of ONO triple-dielectric for memory cell is tunnel oxide of 24${\AA}$, nitride of 74 ${\AA}$, blocking oxide of 25 ${\AA}$, respectively. The program mode(Vg: 7,8,9 V, Vs/Vd: -3 V, Vb: floating) and the erase mode(Vg: -4,-5,-6 V, Vs/Vd: floating, Vb: 3V) by modified Fowler-Nordheim(MFN) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation($\Delta$Vth, S, Gm) characteristics than channel MFN tunneling operation. Also the program inhibit conditions of unselected cell for separated source lines NOR-tyupe flash memory application were investigated. we demonstrated that the program disturb phenomenon did not occur at source/drain voltage of 1 V∼4 V and gate voltage of 0 V∼4.

• Nuclear Engineering and Technology
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• 제54권9호
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• pp.3293-3298
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• 2022

Removing radioactive contaminated metal materials is a vital task during the decommissioning of nuclear power plants to reduce the cost of the post-dismantling process. The laser decontamination technique has been recognized as a key tool for a successful dismantling process as it enables a remote operation in radioactive facilities. It also minimizes exposure of workers to hazardous materials and reduces secondary waste, increasing the environmental friendless of the post-dismantling processing. In this work, we present a thorough and efficient laser decontamination approach using a single-mode continuous-wave (CW) laser. We subjected stainless steels to a surface-removal process that repetitively exposes the laser to a confined region of ~75 ㎛ at a high scanning rate of 10 m/s. We evaluate the decontamination performance by measuring the removal depth with a 3D scanning microscope and further investigate optimal removal conditions given practical parameters such as the laser power and scan properties. We successfully removed the metal surface to a depth of more than 40 ㎛ with laser power of 300 W and ten scans, showing the potential to achieve an extremely high DF more than 1000 by simply increasing the number of scans and the laser power for the decontamination of primary circuits.