• 한국초전도학회:학술대회논문집
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• v.9
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• pp.87-90
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• 1999

We have studied the annealing effects of 570 (SrTiO$_3$) single crystal substrate and the I-V properties of step-edge junctions after Ar ion milling. YBa$_2Cu_3O_7$ (YBCO) thin films are fabricated on the substrates by using pulsed laser deposition (PLD) and photolithography. The surface of Ar ion milled substrate was characterized with atomic force microscope (AFM) and scanning electron microscope (SEM) images. After the substrate was damaged by milling, the critical current density of YBCO thin films deposited on the substrate was lowered. The annealing of the damaged substrate at about 1000 $^{\circ}C$ recovered the critical current density to that before the milling. Futhermore the annealing helped junction formation due to high quality film and increased the yield rate for the fabrication of high quality step-edge junction.

• Progress in Superconductivity and Cryogenics
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• v.6 no.3
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• pp.6-11
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• 2004

YBa$_2$Cu$_3$$O_{7-x}$ (YBCO) films were deposited on MgO(100) and SrTiO$_3$(100) single crystal substrates by cold-wall type MOCVD method using continuous source supplying system. Under the deposition temperature of 740∼76$0^{\circ}C$, c-axis oriented YBCO films were obtained. In case of the YBCO films deposited on MgO (100) single crystal substrate, the critical temperature (T$_{c}$) was under 81 K regardless of the deposition conditions, whereas T$_{c}$ of the YBCO films deposited on SrTiO$_3$(100) single crystal substrate was 83∼84 K. The critical current (I$_{c}$) of the YBCO film deposited on SrTiO$_3$(100) single crystal substrate for 30 min was 49 A/cm-width and the critical current density (J$_{c}$) was 0.82 MA/$\textrm{cm}^2$ to film thickness of 0.6 ${\mu}{\textrm}{m}$. I$_{c}$ increased to 84.4 A/cm-width as the deposition time increased to 50 min, but J$_{c}$ decreased to 0.53 MA/$\textrm{cm}^2$ to film thickness of 1.8 ${\mu}{\textrm}{m}$.rm}{m}$.

• KIEE International Transactions on Electrophysics and Applications
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• v.3C no.2
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• pp.55-58
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• 2003

This paper examines the electrical characteristic of single oxide layer due to various diffusion conditions, substrate orientations, substrate resistivity and gas atmosphere in a diffusion furnace. The oxide quality was examined through the capacitance-voltage characteristic due to the annealing time after oxidation process, and the capacitance-voltage characteristics of the single oxide layer by will be described via semiconductor device simulation.

• Journal of the Korean Physical Society
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• v.73 no.9
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• pp.1346-1350
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• 2018

An electrode-evaporation technology on both the top and bottom sides of the bare vertical-type single chip separated from the traditional substrate by cooling, was developed for III-nitride vertical-type single chip LEDs with thick GaN epilayer. The post-process of the cooling step was followed by sorting the bare vertical-type single chip LEDs into the holes in a pocket-type shadow mask for deposition of the electrodes at the top and bottom sides of bare vertical-type single chip LEDs without the traditional substrate for electrode evaporation technology for vertical-type single chip LEDs. The variation in size of the hole between the designed shadow mask and the deposited electrodes owing to the use of the designed pocket-type shadow mask is investigated. Furthermore, the electrical and the optical properties of bare vertical-type single chip LEDs deposited with two different shapes of n-type electrodes using the pocket-type shadow mask are investigated to explore the possibility of the e-beam evaporation method.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.6
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• pp.535-541
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• 1999

Low-dislocation-density large-diameter GaAs single crystals with low-residual-strain have been strongly required. We have developed dislocation-free 3-inch Si doped GaAs crystals for photonic devices, and low-dislocation-density low-residual-strain 4-inch to 6-inch semi-insulating GaAs crystals for electronic devices by Vertical Bridgman(VB) technique. We confirmed that VB substrates with low-residual-strain have higher resistance against slip-line generation during MBE process. VB-GaAs single crystals show uniform radial profile of resistivity reflecting to the flat solid-liquid interface during the crystal growth. Uniformity of micro-resistivity of VB-GaAs substrate is much better than of the LEC-GaAs substrate, which is due to the low-dislocation-density of VB-GaAs single crystals.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.12
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• pp.24-30
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• 1991

As a study to use Ti-silicides as interconnection material, the formation of Ti-silicides and the behavior of dopants were investigated for specimens where dopants are introduced on both single-Si substrate and poly-Si that was deposited on the single-Si. Result showed that stable C54 TiSiS12T formed above $700^{\circ}C$ and the formed TiSiS12T had bad surface roughness. And arsenics were chiefly redistributed in TiSiS12T while boron was accumulated near the interface between TiSiS11T and Si during RTA treatment.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1999.06a
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• pp.129-157
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• 1999

Low-dislocation-density large-diameter GaAs single crystals with low-residual-strain have been strongly required. We have developed dislocation-free 3-inch Si-doped GaAs crystals for photonic devices [1], and low-dislocation-density low-residual-strain 4-inch to 6-inch [2, 3] semi-insulating GaAs crystals for electronic devices by Vertical Boat (VB) technique. We confirmed that VB substrates with low-residual-strain have higher resistance against slip-line generation during MBE process. VB-GaAs single crystals show uniform radial profile of resistivity reflecting to the flat solid-liquid interface during the crystal growth. Uniformity of micro-resistivity of VB-GaAs substrate is much better than that of the LEC-GaAs substrate, which is due to the low-dislocation-density of VB-GaAs single crystals.

• Journal of the Korean Ceramic Society
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• v.44 no.4 s.299
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• pp.202-207
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• 2007

High-Quality 1-Dimensional InN single crystalline have been grown by Halide Vapor-Phase Epitaxy on the Au catalyst coated Si substrate using the vapor-liquid-solid growth mechanism. We have been grown 1-dimension InN nanowires having controlled the growth conditions for substrate temperature and gases flow rate. The grown InN nanowire of characteristics for morphologies, crystal structure, and element analysis were carried out by SEM, HR-TEM, and EDS respectively. And the defects of InN crystalline were analyzed by indexing of selective area diffraction pattern with attached HR-TEM. We have successfully obtained the defect-free 1-dimensional InN single crystalline nanowire at the atmosphere pressure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.239-242
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• 2004

A stoichiometric mixture of evaporating materials for $CdIn_2S_4$ single crystal thin films was prepared from horizontal furnace. To obtain the single crystal thin films, $CdIn_2S_4$ mixed crystal was deposited on thoroughly etched semi-insulating GaAs(100) substrate by hot wall epitaxy(HWE) system. The source and substrate temperatures were $630^{\circ}C$ and $420^{\circ}C$ respectively. The crystalline structure of single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction(DCXD). The carrier density and mobility of $CdIn_2S_4$ single crystal thin films measured from Hall effect by van der Pauw method are $9.01{\times}10^{16}\;cm^{-3}$ and $219\;cm^2/V{\cdot}s$ at 293 K, respectively. From the optical absorption measurement, the temperature dependence of energy band gap on $CdIn_2S_4$ single crystal thin films was found to be $E_g(T)\;=\;2.7116\;eV\;-\;(7.74{\times}10^{-4}\;eV)T^2/(T+434)$. After the as-grown $CdIn_2S_4$ single crystal thin films was annealed in Cd-, S-, and In-atmospheres, the origin of point defects of $CdIn_2S_4$ single crystal thin films has been investigated by the photoluminescence(PL) at 10 K.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.81-82
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• 2007

The stochiometric mix of evaporating materials for the $CdGa_2Se_4$ single crystal thin films was prepared from horizontal furnace. To obtain the single crystal thin films, $CdGa_2Se_4$ mixed crystal was deposited on thoroughly etched semi-insulating GaAs(100) substrate by the Hot Wall Epitaxy (HWE) system. The source and substrate temperature were $630^{\circ}C\;and\;420^{\circ}C$, respectively. After the as-grown single crystal $CdGa_2Se_4$ thin films were annealed in Cd-, Se-, and Ga -atmospheres, the origin of point defects of single crystal $CdGa_2Se_4$ thin films has been investigated by PL at 10 K. The native defects of $V_{Cd},\;V_{Se},\;Cd_{int},\;and\;Se_{int}$ obtained by PL measurements were classified as donors or acceptors. And we concluded that the heat-treatment in the Cd-atmosphere converted single crystal $CdGa_2Se_4$ thin films to an optical p-type. Also, we confirmed that Ga in $CdGa_2Se_4$/GaAs did not form the native defects because Ga in single crystal $CdGa_2Se_4$ thin films existed in the form of stable bonds.