• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.387-390
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• 2006

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit Incorporating boost-half-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switching mode and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft switching (ZVS) operation ranges and the power dissipation as compared with those of the previously developed high-frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation (PWM) and pulse density modulation (PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.22-28
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• 1998

A new type of FET source mixer with a single bias voltage has been presented. It is designed to operate at Vds=0 [V] with only one positive supply voltage, which makes mixer circuits simple. The proposed mixer has shown improved stability and less sensitivity to both bias and LO power compared with conventional active mixers. It also shows lower conversion loss than that of diode mixers. The minimum conversion loss measured at RF frequency of 5.6㎓ is 0.6㏈ for a LO frequency of 5.8㎓.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.66 no.3
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• pp.99-104
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• 2017

The three-phase four-wire power distribution system can be used to supply power to single-phase and three-phase loads at the same time. There are linear loads and nonlinear loads as single-phase loads connected to each phase. The nonlinear load generates a harmonic current during the power energy conversion process. In particular, the single-phase nonlinear load has a higher proportion of generation of the third harmonic current than the harmonics of the other orders. In a three-phase four-wire system, the third harmonic current flows through the neutral wire to the power supply side, affecting the power supply side and the line. Furthermore, the magnitude of the current flowing in the neutral line can be higher than the current flowing in the individual phase. If the neutral current is higher than the phase current, the breaker may be blocked. Therefore, it is necessary to reduce the amount of current flowing in the neutral line by harmonics. There is a method of zigzag connecting a single phase transformer by a method of reducing 3 harmonic current. In this study, the method of reducing the magnitude of the three harmonic currents flowing through the zigzag wire by comparing the polarity and the negative polarity characteristics of the single phase transformer was compared through measurement and simulation.

• Journal of information and communication convergence engineering
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• v.14 no.1
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• pp.35-39
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• 2016

In this paper, we develop a 94-GHz single balanced mixer with low conversion loss using planar Schottky diodes on a GaAs substrate. The GaAs Schottky diode has a nanoscale anode with a T-shaped disk that can yield high cutoff frequency characteristics. The fabricated Schottky diode with an anode diameter of 500 nm has a series resistance of 21 Ω, an ideality factor of 1.32, a junction capacitance of 8.03 fF, and a cutoff frequency of 944 GHz. Based on this technology, a 94-GHz single balanced mixer was constructed. The fabricated mixer shows an average conversion loss of -7.58 dB at an RF frequency of 92.5 GHz to 95 GHz and an IF frequency of 500 MHz with an LO power of 7 dBm. The RF-to-LO isolation characteristics were greater than -32 dB. These values are considered to be attributed to superior Schottky diode characteristics.

• Journal of electromagnetic engineering and science
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• v.4 no.4
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• pp.143-149
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• 2004

This paper describes characteristics of the single-balanced low IF resistive FET mixer for the digital beam forming(DBF) receiver. This DBF receiver based on the direct conversion method is designed with Low IF I and Q channel. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 1950 MHz, 1940 MHz and 10 MHz, respectively. Super low noise HJ FET of NE3210S01 is considered in design. The measured results of the proposed mixer are observed IF output power of -22.8 dBm without spurious signal at 10 MHz, conversion loss of -12.8 dB, isolation characteristics of -20 dB below, 1 dB gain compression point(PldB) of -3.9 dBm, input third order intercept point(IIP3) of 20 dBm, output third order intercept point(OIP3) of 4 dBm and dynamic range of 30 dBm. The proposed mixer has 1.0 dB higher IIP3 than previously published single-balanced resistive and GaAs FET mixers, and has 3.0 dB higher IIP3 and 4.3 dB higher PldB than CMOS mixers. This mixer was fabricated on 0.7874 mm thick microstrip $substrate(\varepsilon_r=2.5)$ and the total size is $123.1\;mm\times107.6\;mm$.

• ETRI Journal
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• v.38 no.2
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• pp.217-226
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• 2016

We propose an architecture that reduces the power consumption and active area of such a modulator through a reduction in the number of active components and a simplification of the topology. The proposed architecture reduces the power consumption and active area by reducing the number of active components and simplifying the modulator topology. A novel second-order loop filter that uses a single operational amplifier resonator reduces the number of active elements and enhances the controllability of the transfer function. A trapezoidal-shape half-delayed return-to-zero feedback DAC eliminates the loop-delay compensation circuitry and improves pulse-delay sensitivity. These simple features of the modulator allow higher frequency operation and more design flexibility. Implemented in a 130 nm CMOS technology, the prototype modulator occupies an active area of $0.098mm^2$ and consumes 5.23 mW power from a 1.2 V supply. It achieves a dynamic range of 62 dB and a peak SNDR of 60.95 dB over a 15 MHz signal bandwidth with a sampling frequency of 780 MHz. The figure-of-merit of the modulator is 191 fJ/conversion-step.

• International journal of advanced smart convergence
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• v.10 no.1
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• pp.12-23
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• 2021

This paper proposes a low power radio frequency receiver front-end where, in a single stage, single-balanced mixer and voltage-controlled oscillator are stacked on top of low noise amplifier and re-use the dc current to reduce the power consumption. In the proposed topology, the voltage-controlled oscillator itself plays the dual role of oscillator and mixer by exploiting a series inductor-capacitor network. Using a 65 nm complementary metal oxide semiconductor technology, the proposed radio frequency front-end is designed and simulated. Oscillating at around 2.4 GHz frequency band, the voltage-controlled oscillator of the proposed radio frequency front-end achieves the phase noise of -72 dBc/Hz, -93 dBc/Hz, and -113 dBc/Hz at 10KHz, 100KHz, and 1 MHz offset frequency, respectively. The simulated voltage conversion gain is about 25 dB. The double-side band noise figure is -14.2 dB, -8.8 dB, and -7.3 dB at 100 KHz, 1 MHz and 10 MHz offset. The radio frequency front-end consumes only 96 ㎼ dc power from a 1-V supply.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.319-322
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• 1999

This paper presents a novel single-stage Power Factor Corrected(PFC) AC/DC forward converter with semi-automatic current shaping in order to achieve the unity power factor and an isolated output. Since the proposed circuit is combined a boost converter used for PFCs with a forward converter used for DC to DC conversion, the over-all size of system could be reduced. And thanks to the zero voltage switching(ZVS) in both switches, the voltage stress can be reduced considerably. A simple auxiliary circuit adopted into the secondary of transformer is composed of lossless components for reducing surge voltage. A prototype which has tow IGBT(Insulated Gate Bypolar Transistor) modules as switching device is manufactured to evaluate the proposed topology. The characteristics of the proposed circuit are tested, and the validity is verified by experimental results.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.406-408
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• 1999

In order to reduce the overall size and cost, researchers attempted to integrate the functions of power factor correction(PFC) and isolated dc-dc conversion into single power stage. However, single-stage isolated PFC converters have higher voltage stress and heavier loss when compared with a normal dc-dc converters. In this paper, we propose to add active clamping circuit to keep the switch voltage stress low and to achieve soft switching of electronic devices.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.408-410
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• 2005

Multilevel converters have emerged like a new strategy for energy conversion from medium power to high power. The main characteristic of the topologies classified as multilevel, is the use of commutation devices connected in series, allowing the distribution of the voltage and reducing stress in the commutation switches. Stacked Multicell Converter (SMC), is classified as single-phase voltage source inverter(VSI). Due to the fact, the SMC generates a signal of alternating current of several levels of voltage of direct current. The following work will demonstrate the flexibility of the above mentioned topology using a low cost control circuit architecture.