• 한국기계가공학회지
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• 제9권2호
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• pp.26-32
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• 2010

This paper reports some experimental result in grinding and polishing of silicon cathodes used in semiconductor manufacturing process. Cup shape diamond core wheels were used in experiments and the radial and tangential grinding forces were measured with surface roughness. In polishing experiments, flat type and donut type wool polishing tools were tested. The experimental results indicate that the grinding forces are proportional to the material removal rates and the surface roughness are inversely proportional to the spindle speed. The surface roughness of polished Si decreases with polishing time and higher spindle speed.

• 천문학논총
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• 제30권2호
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• pp.687-690
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• 2015

For research and development of Silicon Carbide (SiC) mirrors, the Korea Astronomy and Space Science Institute (KASI) and National Optical Astronomy Observatory (NOAO) have agreed to cooperate and share on polishing and measuring facilities, experience and human resources for two years (2014-2015). The main goals of the SiC mirror polishing are to achieve optical surface figures of less than 20 nm rms and optical surface roughness of less than 2 nm rms. In addition, Green Optics Co., Ltd (GO) has been interested in the SiC polishing and joined the partnership with KASI. KASI will be involved in the development of the SiC polishing and the optical surface measurement using three different kinds of SiC materials and manufacturing processes (POCO$^{TM}$, CoorsTek$^{TM}$ and SSG$^{TM}$ corporations) provided by NOAO. GO will polish the SiC substrate within requirements. Additionally, the requirements of the optical surface imperfections are given as: less than 40 um scratch and 500 um dig. In this paper, we introduce the international collaboration and interim results for SiC mirror polishing and development.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제50권9호
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• pp.438-443
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• 2001

In the shallow trench isolation(STI)-chemical mechanical polishing(CMP) process, the key issues are the optimized thickness control, within-wafer-non-uniformity, and the possible defects such as pad oxide damage and nitride residue. The defect like nitride residue and silicon (or pad oxide) damage after STI-CMP process were discussed to accomplish its optimum process condition. To understand its optimum process condition, overall STI related processes including reverse moat etch, trench etch, STI fill and STI-CMP were discussed. Consequently, we could conclude that law trench depth and high CMP thickness can cause nitride residue, and high trench depth and over-polishing can cause silicon damage.

• International Journal of Precision Engineering and Manufacturing
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• 제5권2호
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• pp.32-38
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• 2004

The electrorheological(ER) fluid has been used to the ultraprecision polishing of single crystal silicon as new polishing slurry whose properties such as yield stress and particle structure changed with the application of an electric field. In this work, it is aimed to find the effective parameters in the ER fluid on material removal in the polishing system whose structure is similar to that of the simple hydrodynamic bearing. The generated pressure in the gap between a moving wall and a workpiece, as well as the electric field-induced stress of the mixture of ER fluid-abrasives, is evaluated experimentally, and their influence on the polishing of single crystal silicon is analyzed. Moreover, the behavior of abrasive and ER particles is described.

• 한국진공학회지
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• 제10권3호
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• pp.361-367
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• 2001

CMP(Chemical Mechanical Polishing)는 반도체 소자 제조공정 중 다층 배선구조의 평탄 경면화에 널리 이용되고 있다. 차세대 웨이퍼로 각광받는 SOI(Silicon On Insulator) 웨이퍼 제조공정 중 웨이퍼 표면 미소 거칠기를 개선하기 위해서 본 논문에서는 여러 가지 가공변수(슬러리와 연마패드)에 따른 CMP 연마능률과 표면 미소 거칠기 변화에 대해 연구하였다. 결과적으로 연마능률은 슬러리의 입자 크기가 증가할수록 이에 따라 증가하였으며, 미소 거칠기는 슬러리의 연마입자보다는 연마패드에 영향이 더욱 지배적이다. AFM(Atomic Force Microscope)에 의한 평가에서 표면 미소 거칠기가 27 $\AA$ Rms에서 0.64 $\AA$ Rms로 개선됨을 확인할 수 있었다.

• 한국기계가공학회지
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• 제10권6호
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• pp.146-151
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• 2011

Wax spin coating is a part of several wafer handling processes in the silicon wafer polishing station. It is important to ensure the wax layer free of contamination to achieve the high degree of planarization on wafers after wafer polishing. Three-dimensional air flow characteristics in a wax spin coater are numerically investigated using computational fluid dynamics techniques. When the bottom of the wax spin coater is closed, there exists a significant recirculation zone over the rotating ceramic block. This recirculation zone can be the source of wax layer contamination at any rotational speed and should be avoided to maintain high wafer polishing quality. Thus, four air suction ducts are installed at the bottom of the wax spin coater in order to control the air flow pattern over the ceramic block. Present computational results show that the air suction from the bottom is quite an effective method to remove or minimize the recirculation zone over the ceramic block and the wax coating layer.

• 한국정밀공학회지
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• 제22권4호
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• pp.44-51
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• 2005

In this paper, a new polishing head with the variable pressure structure was studied to improve the planarization uniformity of the conventional template-metal head. Metal surface waviness and slurry distribution on the pad have been known to affect the polishing uniformity even in the synchronized quill and platen velocities. A polishing head with silicon rubber sheet was used to get a curved pressure distribution. In the experiment, the vertical deflection behavior on the pad was characterized with back pressure in the air chamber. Quill force increased linearly with backpressure. However, backpressure under a quill force made the upward movements of the quill. In the wafer polishing experiments, polishing rate and polishing thickness distribution were severely changed with backpressure. The best uniformity was observed with the standard deviation off.5％ level of average polishing removal 215nm at backpressure 12.1kPa.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1996년도 제11회 학술발표회 논문개요집
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• pp.100-101
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• 1996

• 한국진공학회지
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• 제7권2호
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• pp.88-93
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• 1998

본 연구에서는 기계-화학적 연마(Chemical-Mechanical-Polishing: CMP)공정을 이용 하여 게이트 전극을 가지는 실리콘 전계방출 소자를 제작하였으며, 또한 그 전자방출 특성 을 분석하였다. 실리콘 전계방출 소자를 제작하기 위해 실리콘을 두단계로 이루어진 건식식 각과 산화공정으로 팁을 뾰족하게 만들었으며, 게이트를 형성하기 위하여 고 선택비를 가지 는 CMP공정을 사용하였으며, 연마 시간과 연마 압력의 변화로 게이트 높이와 개구의 직경 을 쉽게 조절할 수 있었다. 또한, CMP공정시 발생되는 디싱(dishing)문제를 산화막 마스킹 을 사용함으로 해결하여 자동 정렬된 게이트전극의 개구를 깨끗하게 형성할 수 있었다. 제 작된 에미터의 높이와 팁끝의 반경은 각각 1.1$\mu$m, 100$\AA$정도이며, 제작된 2809개의 팁 어 레이로 80V의 게이트전압에서 31$\mu$A의 방출전류를 얻을 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.55-56
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• 2006

This research was carried out to observe the structure and characteristics of SUBA pad for silicon wafer polishing. As the diamond size is smaller and shape is rounder, the pad cut rate becomes smaller. From the experimental results, we suggests that the diamond grade should be over 680 when the diamond mesh is between #100 and #170 for SUBA pad.