• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.1
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• pp.71-76
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• 1994

Schottky diodes have been fabricated using the SDB wafer, and their characteristics have been investigated. For comparison, conventional planar and etched most structure were made on the same substrate. The ideality factor and barrier height of the fabricated devices are found to be 1.03 and 0.77eV, respectively. Breakdown volttge of the etched mesa Schottky diode has been increased to 180V. whereas it is 90V for the planar diode. Schottky diode with an etched mesa exhibits twice improvement in breaktown voltage.

• Journal of Electrical Engineering and Technology
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• v.11 no.4
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• pp.939-942
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• 2016

One of the most important characteristic curves of a solar cell is its current density-voltage (J-V) curve under AM1.5G insolation. Solar cell can be considered as a semiconductor diode, so a diode equivalent model was used to estimate its parameters from the J-V curve by numerical simulation. Active layer plays an important role in operation of a solar cell. We investigated the effect thicknesses and defect densities (N_d) of the active layer on the J-V curve. When the active layer thickness was varied (for N_d = 8×10¹⁷ cm^-3) from 800 nm to 100 nm, the reverse saturation current density (J_o) changed from 3.56×10^-5 A/cm² to 9.62×10^-11 A/cm² and its ideality factor (n) changed from 5.28 to 2.02. For a reduced defect density (N_d = 4×10¹⁵ cm^-3), the n remained within 1.45≤n≤1.92 for the same thickness range. A small increase in shunt resistance and almost no change in series resistance were observed in these cells. The low reverse saturation current density (J_o = 9.62×10^-11 A/cm²) and diode ideality factor (n = 2.02 or 1.45) were observed for amorphous silicon based solar cell with 100 nm thick active layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.65-65
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• 2009

High temperature silicon carbide Schottky diode was fabricated with Au deposited on poly 3C-SiC thin film grown on p-type Si(100) using atmospheric pressure chemical vapor deposition. The charge transport mechanism of the diode was studied in the temperature range of 300 K to 550 K. The forward and reverse bias currents of the diode increase strongly with temperature and diode shows a non-ideal behavior due to the series resistance and the interface states associated with 3C-SiC. The charge transport mechanism is a temperature activated process, in which, the electrons passes over of the low barriers and in turn, diode has a large ideality factor. The charge transport mechanism of the diode was analyzed by a Gaussian distribution of the Schottky barrier heights due to the Schottky barrier inhomogeneities at the metal-semiconductor interface and the mean barrier height and zero-bias standard deviation values for the diode was found to be 1.82 eV and $s_0$=0.233 V, respectively. The interface state density of the diode was determined using conductance-frequency and it was of order of $9.18{\times}10^{10}eV^{-1}cm^{-2}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04a
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• pp.187-190
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• 2000

We fabricated general photo diode, surface etched photo diode and floating gate MOSFET by CMOS process. In a design stage, we expect that surface etched photo diode will be improved as to photo sensitivity. However, because the surface of silicon was damaged in etching process, the surface etched diode had a high dark current as well as low photo current level. Finally, we examined the current-voltage properties for the floating gate MOSFET on n-well and confirmed that the device can be act as an efficient photo-sensor. The floating gate MOSFET was operated in parasitic bipolar transistor mode.

• Journal of the Korea Institute of Military Science and Technology
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• v.10 no.4
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• pp.152-159
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• 2007

In this paper, a new design technique on the LRF which is useful for low power laser and a CBDA(Cummulative Binary Detection Algorithm) is proposed. The LD(Laser Diode) and Si-APD(Silicon Avalanche Photo Diode) are used for saving a power. In order to prove the detection range, the Si-APD binary data are accumulated before the range computation and the range finding algorithm. A prototype of the proposed DLRF(Diode Laser Range Finder) system was made and tested. An experimental result shows that the DLRF system have the same detection range using a less power(almost 1/32) than an usual military LRF. The proposed DLRF can be applied to the Unmanned Vehicles, Robot and Future Combat System of a tiny size and a low power LRF.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.336-336
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• 2011

AMOLED에 대한 관심이 높아짐에 따라 LTPS (Low Temperature Poly Silicon) TFT에 대한 연구가 활발히 이루어지고 있다. 다결정 실리콘은 단결정 실리콘에 비해 100 cm2/V 이상의 이동도를 보이는 우수한 특성으로 인해 AMOLED 디스플레이에 적합하며 여러 기업에서 LTPS 공정을 이용한 TFT제작을 연구 중이다. LTPS 공정은 현재 ELA (Excimer Laser Annealing) 방식으로 대면적 유리기판에 ELA 방법을 적용함에 있어 설비투자 비용이 지나치게 높아진다는 단점을 가지고 있다. 설비투자 비용의 문제점을 해결하기 위해 Diode Laser을 이용하여 Annealing하는 방법에 대해 연구하였다. 본 연구는 Diode Laser Annealing 방식을 이용하여 poly-Si을 구현하였다. 단결정 실리콘을 제작하기 위해 ICP-CVD장비를 이용하여 150$^{\circ}C$에서 SiH4, He2 혼합, He/SiH4의 flow rate는 20/2[sccm], RF power는 400 W에서 700 W으로 가변, 증착 압력은 25mTorr으로 하였다. 940 nm 파장의 30 W Diode Laser를 8 mm Spot Size로 a-Si에 순간 조사하여 결정화, 그 결과 grain을 형성한 polycrystalline 구조를 확인하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.205-208
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• 2001

Steady state and transient thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage for microwave oven. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally copper wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin and epoxy with a thickness of $25{\mu}m$ and $3700{\mu}m$, respectively. The chip size, thickness and material properties were very important factor for high voltage diode package. And also, thermal stress value was highest in the edge of diode and solder. So, design of edge in silicon was very important to thermal stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.205-208
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• 2001

Steady state and transient thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage for microwave oven. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally copper wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin and epoxy with a thickness of 25$\mu\textrm{m}$ and 3,700$\mu\textrm{m}$, respectively. The chip size, thickness and material properties were very important factor for high voltage diode package. And also, thermal stress value was highest in the edge of diode and solder. So, design of edge in silicon was very important to thermal stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.805-808
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• 2002

A carbon monoxide gas sensor utilizing Pt-SiC, Pt-SnO2-SiC diode structure was fabricated. Since the operating temperature for silicon devices in limited to 200oC, sensor which employ the silicon substrate can not at high temperature. In this study, CO gas sensor operating at high temperature which utilize SiC semiconductor as a substrate was developed. Since the SiC is the semiconductor with wide band gap. the sensor at above $700^{\circ}C$. Carbon monoxide-sensing behavior of Pt-SiC, Pt-SnO2-SiC diode is systematically compared and analyzed as a function of carbon monoxide concentration and temperature by I-V and ${\Delta}$I-t method under steady-state and transient conditions.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.11
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• pp.855-858
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• 2011

In this paper, in order to suppress unwanted current paths originating from adjacent cells in a passive crossbar array based on resistive random access memory (RRAM) without extrinsic switching devices, 1-diode type RRAM which consists of a 0.2% chromium-doped strontium titanate (Cr-$SrTiO_3$) film deposited on a silicon substrate, was proposed for high packing density, and intrinsic rectifying characteristics from the current versus voltage characteristics were successfully demonstrated.