• Journal of the Korean Physical Society
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• 제73권12호
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• pp.1895-1898
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• 2018

The mechanical properties of Al, Ti, Fe, and Cu metals p-type Si, and n-type Si were investigated by using coincidence Doppler broadening (CDB) positron annihilation spectroscopy. The samples in this experiment were irradiated by using X-rays at generating powers for up to 9 kW. The data taken after the irradiation showed all the characteristic features predicted from defects with vacancies. The S parameter values of the metals were generally less than those of semiconductors such as p-type Si and n-type Si. The relationship between n-type Si and p-type Si were more affected when n-type Si rather than p-type Si was irradiated with X-rays.

• 전자공학회논문지A
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• 제31A권7호
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• pp.85-94
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• 1994

A high-resolution transmission electron microscopy study of the solid phase crystallization of the amorphous silicon thin films, deposited on SiOS12T at 52$0^{\circ}C$ by low pressure chemical vapor deposition and annealed at 55$0^{\circ}C$ in a dry N$_{2}$ ambient was carried out so that the arrangement of atoms in the crystalline silicon and at the amorphous/crystalline interface of the growing grains could be understood on an atomic level. Results show that circular crystalline silicon nuclei have formed and then the grains grow to an elliptical or dendritic shape. In the interior of all the grains many twins whose{111} coherent boundaries are parallel to the long axes of the grains are observed. From this result, it is concluded that the twins enhance the preferential grain growth in the <112> direction along {111} twin planes. In addition to the twins. many defect such as intrinsic stacking faults, extrinsic stacking faults, and Shockley partial dislocations, which can be formed by the errors in the stacking sequence or by the dissociation of the perfect dislocation are found in the silicon grain. But neither frank partial dislocations which can be formed by the condensation of excess silicon atoms or vacancies and can form stacking fault nor perfect dislocations which can be formed by the plastic deformation are observed. So it is concluded that most defects in the silicon grain are formed by the errors in the stacking sequence during the crystallization process of the amorphous silicon thin films.

• 한국진공학회지
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• 제10권2호
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• pp.247-251
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• 2001

실리콘산화막에 $Si^+$이온을 주입하여 열처리를 한 후 상온에서 8K까지 온도를 변화시키며 PL을 측정하였다. 상온에서 50~80K까지는 PL intensity가 전체적으로 증가하였으며 50K 이하에서는 감소하였다. PL intensity가 증가하는 동안 peaks는 blue-shift가 일어났다. PL spectrum에서 peak를 보이는 파장에서 PL의 온도의존성을 측정하였다. 첫 번째 peak가 온도변화에 가장 민감하며 크기가 작은 peak일수록 온도의 영향을 적게 받는다. PL peak의 온도의존성을 분석하였다. 상온에서 50K 범위에서 PL intensity 대 1000/T그림에서 온도역수의 3차 함수로 fitting할 수 있었다. 온도가 내려갈수록 PL intensity가 증가하는 것을 nanocrystal 보다도 O위주 결함(Si-O-O)이나 Si위주 결함(Si-Si-O)들의 quantum size effect로 설명할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.310-313
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• 2002

Structures obtained with a direct boning of two FZ silicon wafers joined in such a way that a smooth surface of one wafer was attached to the grooved surface of the other were studied. A square net of grooves was made with a conventional photo lithography process. After high temperature annealing the appearance of voids and the rearrangement of structural defects were observed with X-ray diffraction topography techniques. It was shown that the formation of void free grooved boundaries was feasible. In the cases when particulate contamination was prevented, the voids appeared in the grooved structures could be eliminated with annealing. Since it was found that the flattening was accompanied with plastic deformation, this deformation was suggested to be intensively involved in the process of void removal. A model was proposed explaining the interaction between the structural defects resulted in "a dissolution" of cavities. The described processes may occur in grooved as well as in smooth structures, but there are the former that allow to manage air traps and undesirable excess of dislocation density. Grooves can be paths for air leave. According to the established mechanisms, if not outdone, the dislocations form local defect arrangements at the grooves permitting the substantial reduction in defect density over the remainder of the interfacial area.

• 한국진공학회지
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• 제22권6호
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• pp.341-347
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• 2013

동시 계수 도플러 넓어짐 양전자 소멸 분광법으로 n형과 p형 실리콘 시료에 40.0, 3.98 MeV 에너지를 가진 $0.0{\sim}20.0{\times}10^{13}protons/cm^2$ 양성자 빔 조사에 의한 결함을 측정하여 시료 특성을 조사하였다. 양전자와 전자의 쌍소멸로 발생하는 감마선 스펙트럼의 전자 밀도 에너지에 의한 수리적 해석 방법인 S-변수를 사용하여, 시료의 구조 변화를 측정하였다. 본 연구에서 측정된 S-변수는 시료에 조사된 양성자 조사량의 변화에 따라 결함이 증가하였으며, 그리고 40 MeV 양성자 빔의 세기는 n형 실리콘에서 빔의 조사량 $20.0{\times}10^{13}protons/cm^2$에서 3.98 MeV 보다 결함의 영향이 더 큰 것으로 나타났다. 그 결과 조사에 너지와 조사량의 상관관계를 비교 분석하였다. SRIM 시뮬레이션의 결과는, 양성자의 Bragg 피크 특성 때문에 시료 전체에 대한 결함으로 나타나기 보다는 양성자가 시료의 특정 깊이에 주로 결함을 형성하는 것을 보여 준다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.438-438
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• 2009

We have investigated the effect of forming gas annealing for Upgraded Metallurgical Grade (UMG)-silicon solar cell in order to obtain low-cost high-efficiency cell using post deposition anneal at a relatively low temperature. We have observed that high concentration hydrogenation effectively passivated the defects and improved the minority carrier lifetime, series resistance and conversion efficiency. It can be attributed to significantly improved hydrogen-passivation in high concentration hydrogen process. This improvement can be explained by the enhanced passivation of silicon solar cell with antireflection layer due to hydrogen re-incorporation. The results of this experiment represent a promising guideline for improving the high-efficiency solar cells by introducing an easy and low cost process of post hydrogenation in optimized condition.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.109-109
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• 2006

Screen printing (SP) metal contact is typically applied to the solar cells for mass production. However, SP metal contact has low aspect ratio, low accuracy, hard control of the substrate penetration and unclean process. On the other hand, photo lithograpy (PL) metal contact can reduce defects by metal contact. In this investigation, PL metal contact was obtained the multi-layer structure of Ti/Pd/Ag by e-beam process. We applied SP metal contact and PL metal contact to single crystalline silicon solar cells, and demonstrated the difference of conversion efficiency. Because PL metal contact silicon solar cell has Jsc (short circuit current density) better than silicon solar cell applied SP metal contact.

• Transactions on Electrical and Electronic Materials
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• 제15권4호
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• pp.207-212
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• 2014

Aluminum-doped zinc oxide (AZO) films were deposited on SiOC/Si wafer by an RF-magnetron sputtering system, by varying the deposition parameters of radio frequency power from 50 to 200 W. To assess the correlation of the optical properties between the substrate and AZO thin film, photoluminescence was measured, and the origin of deep level emission of AZO thin films grown on SiOC/Si wafer was studied. AZO formed on SiOC/Si substrates exhibited ultraviolet emission due to exciton recombination, and the visible emission was associated with intrinsic and extrinsic defects. For the AZO thin film deposited on SiOC at low RF-power, the deep level emission near the UV region is attributed to an increase of the variations of defects related to the AZO and SiOC layers. The applied RF-power influenced an energy gap of localized trap state produced from the defects, and the gap increased at low RF power due to the formation of new defects across the AZO layer caused by lattice mismatch of the AZO and SiOC films. The optical properties of AZO films on amorphous SiOC compared with those of AZO film on Si were considerably improved by reducing the roughness of the surface with low surface ionization energy, and by solving the problem of structural mismatch with the AZO film and Si wafer.

• 한국결정학회지
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• 제14권2호
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• pp.84-92
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• 2003

고속인상은 후처리에 의하여 쉽게 제거될 수 있도록 성장 결함 분포를 작게 만들기 용이하다. 본 연구에서는, 1.0 mm/min 이상의 속도를 갖는 고속 인상 결정을 육성하였으며, 결정 내의 성장 결함 분포를 분석하였다. 최근의 Cz-Si 결정 성장에서 특정 온도구간에서의 냉각속도와 고액계면에서의 온도구배의 균일성 등이 성장 결함 형성에 대하여 인상속도보다 더 중요한 영향을 주는 것이 발견되었다. 따라서, 고속 인상 결정에서 냉각속도와 온도구배의 영향을 분석하였으며, 이를 실제 관찰된 결함 형성거동과 비교하였다. 이론적 고찰을 통하여 공동 결함 형성에 대한 유효인자(Ω)를 도출하였으며, 이로부터 공동 결함의 반경방향 분포 특성을 효과적으로 설명하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권3호
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• pp.319-325
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• 2017

Through silicon via (TSV) technology is extensively used in 3D IC integrations. The special structure of the TSV is realized by CMP (Chemically Mechanical Polishing) process with a high Cu removal rate and, low dishing, yielding fine topography without defects. In this study, we investigated the electrochemical behavior of copper slurries with various inhibitors in the Cu CMP process for advanced TSV applications. One of the slurries was carried out for the most promising process with a high removal rate (${\sim}18000{\AA}/Min$ @ 3 psi) and low dishing (${\sim}800{\AA}$), providing good microstructure. The effects of pH value and $H_2O_2$ concentration on the slurry corrosion potential and Cu static etching rate (SER) were also examined. The slurry formula with a pH of 6 and 2% $H_2O_2$, hadthe lowest SER (${\sim}75{\AA}/Min$) and was the best for TSV CMP. A novel Cu TSV CMP process was developed with two CMPs and an additional annealing step after some of the bulk Cu had been removed, effectively improving the condition of the TSV Cu surface and preventing the formation of crack defects by variations in wafer stress during TSV process integration.