• Journal of the Korean Vacuum Society
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• v.7 no.2
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• pp.150-154
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• 1998

Photoluminescence(PL), XRD, TEM results $5\times1016/\textrm{cm}^2, 1\times10^{17}/\textrm{cm}^2, 3\times10^{17}/\textrm{cm}^2$ Si-implanted $SiO_2$ films on crystalline silicon are reported. At low dose implantation and low annealing temperature, visible PL are observed. The PL spectrum has 7400$\AA$ and 8360$\AA$ peaks. As annealing time increased, the PL intensity are increased and peak positions are changed. The PL spectrum are not observed at high dose implantation and high annealing temperature. For the samples of low dose and high annealing temperature, visible PL are observed at short annealing time (30 minutes) and disappear for more than 1 hour annealing. From XRD and TEM results, silicon cluster are related to nonradiative defects. It is concluded that the origin of visible PL in Si implanted SiO2 films are not nanocrystal but two kinds of radiative defects. The Si-O-O bonding related defects (O rich defects) and Si-Si-O bonding related defects (Si rich defects) are related to the PL spectrum and depend on concentraion of Si implantation, annealing temperature and time.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.1
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• pp.1-5
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• 2001

STI(shallow trench isolation)-CMP(chemical mechanical polishing) process have been substituted for LOCOS(local oxidation of silicon) process to obtain global planarization in the below sub-0.5㎛ technology. However TI-CMP process, especially TI-CMP with RIE(reactive ion etching) etch back process, has some kinds of defect like nitride residue, torn oxide defect, etc. In this paper, we studied how to reduced torn oxide defects after STI-CMP with RIE etch back processed. Although torn oxide defects which can occur on trench area is not deep and not severe, torn oxide defects on moat area is not deep and not severe, torn oxide defects on moat area is sometimes very deep and makes the yield loss. Thus, we did test on pattern wafers which go through trench process, APECVD process, and RIE etch back process by using an IPEC 472 polisher, IC1000/SUVA4 PAD and KOH base slurry to reduce the number of torn defects and to study what is the origin of torn oxide defects.

• Applied Microscopy
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• v.45 no.3
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• pp.107-114
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• 2015

Two-dimensional (2D) materials containing hole defects are a promising substitute for conventional nanopore membranes like silicon nitride. Hole defects on 2D materials, as atomically thin nanopores, have been used in nanopore devices, such as DNA sensor, gas sensor and purifier at lab-scale. For practical applications of 2D materials to nanopore devices, researches on characteristics of hole defects on graphene, hexagonal boron nitride and molybdenum disulfide have been conducted precisely using transmission electron microscope. Here, we summarized formation, features, structural preference and stability of hole defects on 2D materials with atomic-resolution transmission electron microscope images and theoretical calculations, emphasizing the future challenges in controlling the edge structures and stabilization of hole defects. Exploring the properties at the local structure of hole defects through in situ experiments is also the important issue for the fabrication of realistic 2D nanopore devices.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.98-101
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• 2005

변환 효율이 $16\%$에 근접하는 다결정 실리콘 태양전지를 위한 열처리 공정에 대한 연구를 수행하였다. 고속 열처리 공정이 가능한 RTP 를 사용하여 다결정 실리콘 태양전지의 효율 향상에 요구되는 PECVD $SiN_x$ 반사방지막을 이용한 결정 결함의 수소화 효과를 극대화하는 동시에 양산 가능한 screen-printed contacts 의 특성 (FF >0.76) 올 최적화함으로써 다결정 실리콘 태양전지의 변환 효율을 $15.9\%$까지 향상시킬 수 있었다.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.162-165
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• 1991

Oxygen behaviors in CZ-silicon wafer, grown by the Lucky Advanced Materials Inc. that is a pioneer of silicon material industries in Korea, were investigated to simulate effects on the device performance of oxygen, neglecting the effect of other impurity content, defects and thermal history. Silicon wafers were annealed through simulated 16K SRAM thermal cycle. As initial oxygen concentration increased up to 16.7ppma the amount of oxygen precipitation increased up to 10.6ppma and the bulk microdefect density increased up to $10.3{\times}10^3/mm^2$, but the depth of the denuded zone decreased to $5.0{\mu}m$

• Electrical & Electronic Materials
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• v.7 no.2
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• pp.94-99
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• 1994

The purpose of this work is to investigate the interface characteristics of hydrogenated amorphous silicon thin films prepared by PECVD and photo-induced CVD and to examine the annealing effects of ultraviolet irradiation on hydrogenated amorphous silicon thin films which were degraded by visible light illumination. The interface layer thickness of films deposited by photo-induced CVD was about 600-900.angs. while that by PECVD was about 1000-1300.angs.. These results can show that the quality of interface layer in photo induced CVD film is better than that in PECVD sample. The electrical properties are improved by ultraviolet irradiation on visible light soaked a-Si:H films using photo-CVD light sources, probably due to the fact that UV generates phonons in a-Si:H films and anneal the meta stable defects.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.17-23
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• 2002

The more productive and stable fabrication can be obtained by applying chemical mechanical polishing (CMP) process to shallow trench isolation (STI) structure in 0.18 $\mu\textrm{m}$ semiconductor device. However, STI-CMP process became more complex, and some kinds of defect such as nitride residue, tern oxide defect were seriously increased. Defects like nitride residue and silicon damage after STI-CMP process were discussed to accomplish its optimum process condition. In this paper, we studied how to reduce torn oxide defects and nitride residue after STI-CMP process. To understand its optimum process condition, We studied overall STI-related processes including trench depth, STI-fill thickness and post-CMP thickness. As an experimental result showed that as the STI-fill thickness becomes thinner, and trench depth gets deeper, more tern oxide were found in the CMP process. Also, we could conclude that low trench depth whereas high CMP thickness can cause nitride residue, and high trench depth and over-polishing can cause silicon damage.

• Korean Journal of Materials Research
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• v.34 no.2
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• pp.111-115
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• 2024

Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.7
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• pp.525-531
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• 2011

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

• Rapid Communication in Photoscience
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• v.4 no.3
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• pp.54-58
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• 2015

Under the condition of femtosecond impulsive nonlinear optical irradiation, the bright and narrowed blue emission of silicon nanocrystal was observed. This synthetic method produced very small (~ 4 nm) oxide-capped silicon nanocrystal having probably ultra small emitting core (~ 1 nm) inferred from luminescence. By controlling the stirring condition, very high efficiencies of luminescence ( 4 fold higher) were obtained compared with the other conventional femtosecond laser fragmentation methods, which was attributed to the differences in hydration shell structure during the femtosecond laser induced irreversible phase transition reaction. When we properly adjusted the irradiation times of the white light continuum and stirring condition, very homogeneous luminescent silicon nanocrystal bands having relatively sharp lineshape were obtained, which can be attributable to the luminescent core site isolated and free from the surface defects.