• Title/Summary/Keyword: silicon defects

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Development of Structured Hybrid Illumination System and Optimum Illumination Condition Selection for Detection of Surface Defects on Silicon Wafer in Solar Cell (태양전지 실리콘 웨이퍼의 표면결함 검출을 위한 구조적 하이브리드 조명시스템의 개발 및 최적 조건 선정)

  • An, Byung-In;Kim, Gyung-Bum
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.36 no.5
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    • pp.505-512
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    • 2012
  • In this study, an inspection system based on an optical scanning mechanism is developed for the inspection of silicon wafers in solar cells. In particular, a structured hybrid illumination system that can satisfy the illumination requirement for the detection of various defects is designed. In the hybrid illumination system, the optimum illumination conditions are selected by considering the design of experiment in master glass and silicon wafer. The illumination conditions available are B-high, BG-high, BR-high, and BGR-high for master glass and R-middle-B-medium for silicon wafers. By using the illumination conditions for silicon wafers, numerous surface defects like pinhole, scratch, and chipping, can be accurately detected. The hybrid illumination system is expected to be widely used for the inspection of silicon wafers in solar cells.

Behavior of Solid Phase Crystallization of Amorphous Silicon Films at High Temperatures according to Raman Spectroscopy (라만 분석을 통한 비정질 실리콘 박막의 고온 고상 결정화 거동)

  • Hong, Won-Eui;Ro, Jae-Sang
    • Journal of the Korean institute of surface engineering
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    • v.43 no.1
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    • pp.7-11
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    • 2010
  • Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

A Study on the Formation of Trench Gate for High Power DMOSFET Applications (고 전력 DMOSFET 응용을 위한 트렌치 게이트 형성에 관한 연구)

  • 박훈수;구진근;이영기
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.7
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    • pp.713-717
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    • 2004
  • In this study, the etched trench properties including cross-sectional profile, surface roughness, and crystalline defects were investigated depending on the various silicon etching and additive gases, For the case of HBr$He-O_2SiF_4$ trench etching gas mixtures, the excellent trench profile and minimum defects in the silicon trench were achieved. Due to the residual oxide film grown by the additive oxygen gas, which acts as a protective layer during trench etching, the undercut and defects generation in the trench were suppressed. To improve the electrical characteristics of trench gate, the hydrogen annealing process after trench etching was also adopted. Through the hydrogen annealing, the trench corners might be rounded by the silicon atomic migration at the trench corners having high potential. The rounded trench corner can afford to reduce the gate electric field and grow a uniform gate oxide. As a result, dielectric strength and TDDB characteristics of the hydrogen annealed trench gate oxide were remarkably increased compared to the non-hydrogen annealed one.

A study on point defects induced with neutron irradiation in silicon wafer (중성자 조사에 의해 생성된 점결함 연구)

  • 김진현;류근걸
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.62-66
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    • 2002
  • The conventional floating zone(FZ) crystal and Czochralski(CZ) silicon crystal have resistivity variations longitudinally as well as radially The resistivity variations of the conventional FZ and CZ crystal are not conformed to requirement of dopant distribution for power devices and thyristors. These resistivity variations in conventional cystals limits the reverse breakdown voltage that could be achieved and forced designers of high power diodes and thyristors to compromise the desired current-voltage characteristics. So to produce high Power diodes and thyristors, Neutron Transmutation Doping(NTD) technique is the one method just because NTD silicon provides very homogeneous distribution of doping concentration. This procedure involves the nuclear transmutation of silicon to phosphorus by bombardment of neutron to the crystal according to the reaction $^{30}$ Si(n,${\gamma}$)longrightarrow$^{31}$ Silongrightarrow(2.6 hr)$^{31}$ P+$\beta$$^{[-10]}$ . The radioactive isotope $^{31}$ Si is formed by $^{31}$ Si capturing a neutron, which then decays into the stable $^{31}$ P isotope (i.e., the donor atom), whose distribution is not dependent on the crystal growth parameters. In this research, neutron was irradiated on FZ silicon wafers which had high resistivity(1000~2000 Ω cm), for 26 and 8.3hours for samples of HTS-1 and HTS-2, and 13, 3.2, 2.0 hours for samples of IP-1, IP-2 and IP-3, respectively, to compare resistivity changes due to time differences. The designed resistivities were approached, which were 2.l Ωcm for HTS-1, 7.21 Ω cm for HTS-2, 1.792cm for IP-1, 6.83 Ωcm for IP-2, 9.23 Ωcm for IP-3, respectively. Point defects were investigated with Deep Level Transient Spectroscopy(DLTS). Four different defects were observed at 80K, 125K, 230K, and above 300K.

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Dependence of Thermal Annealing Conditions on Photoluminescence in $SiO_2$ films

  • Lee, Jae-Hee;Lee, Weon-Sik;Kim, Kwang-Il
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.102-102
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    • 1999
  • Visible photoluminescence(PL) in si-implanted SiO2 films on crystaline silicon were observed. Thermal oxide films of 1 ${\mu}{\textrm}{m}$ thickness on P-type crystal silicon were made and si+ ions were implanted with 200keV acceleration voltage on ti. Argon laser (wavelength 488nm) and PM tube were used for PL measurements. As annealing time increased at low temperature, the visible PL intensity are increased and the peak positions are changed. On the other hand, with increasing annealing time at high temperature, the visible PL intensity are disappeared. From the PL peaks and intensity changes, XRD results, and TEM observations, we will discuss the origin of PL in Si+-implanted SiO2 films with oxygen righ defects and silicon rich defects.

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Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors (두 단계 열처리에 의해 제작된 다결정 실리콘 박막트랜지스터의 전기적 특성의 분석)

  • 최권영;한민구;김용상
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.4
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    • pp.568-573
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    • 1996
  • The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

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Transmission Electron Microscopy Study of Stacking Fault Pyramids Formed in Multiple Oxygen Implanted Silicon-on-Insulator Material

  • Park, Ju-Cheol;Lee, June-Dong;Krause, Steve J.
    • Applied Microscopy
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    • v.42 no.3
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    • pp.151-157
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    • 2012
  • The microstructure of various shapes of stacking fault pyramids (SFPs) formed in multiple implant/anneal Separation by Implanted Oxygen (SIMOX) material were investigated by plan-view and cross-sectional transmission electron microscopy. In the multiple implant/anneal SIMOX, the defects in the top silicon layer are confined at the interface of the buried oxide layer at a density of ${\sim}10^6\;cm^{-2}$. The dominant defects are perfect and imperfect SFPs. The perfect SFPs were formed by the expansion and interaction of four dissociated dislocations on the {111} pyramidal planes. The imperfect SFPs show various shapes of SFPs, including I-, L-, and Y-shapes. The shape of imperfect SFPs may depend on the number of dissociated dislocations bounded to the top of the pyramid and the interaction of Shockley partial dislocations at each edge of {111} pyramidal planes.

Melt-Crystal Interface Shape Formation by Crystal Growth Rate and Defect Optimization in Single Crystal Silicon Ingot (단결정 실리콘 잉곳 결정성장 속도에 따른 고-액 경계면 형성 및 Defect 최적화)

  • Jeon, Hye Jun;Park, Ju Hong;Artemyev, Vladimir;Jung, Jae Hak
    • Current Photovoltaic Research
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    • v.8 no.1
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    • pp.17-26
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    • 2020
  • It is clear that monocrystalline Silicon (Si) ingots are the key raw material for semiconductors devices. In the present industries markets, most of monocrystalline Silicon (Si) ingots are made by Czochralski Process due to their advantages with low production cost and the big crystal diameters in comparison with other manufacturing process such as Float-Zone technique. However, the disadvantage of Czochralski Process is the presence of impurities such as oxygen or carbon from the quartz and graphite crucible which later will resulted in defects and then lowering the efficiency of Si wafer. The heat transfer plays an important role in the formation of Si ingots. However, the heat transfer generates convection in Si molten state which induces the defects in Si crystal. In this study, a crystal growth simulation software was used to optimize the Si crystal growth process. The furnace and system design were modified. The results showed the melt-crystal interface shape can affect the Si crystal growth rate and defect points. In this study, the defect points and desired interface shape were controlled by specific crystal growth rate condition.

Carrier Lifetime Analysis of Proton Irradiated SOl Wafer with Pseudo MOSFET Technology (Pseudo MOSFET 기술에 의한 양성자 조사 SOl 웨이퍼의 캐리어 수명 분석)

  • Jung, Sung-Hoon;Lee, Yong-Hyun;Lee, Jae-Sung;Kwon, Young-Kyu;Bae, Young-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.9
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    • pp.732-736
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    • 2009
  • Protons are irradiated into SOl wafers under total dose of 100 krad, 500 krad, 1 Mrad and 2 Mrad to analyze the irradiation effect. The electrical properties are analyzed by pseudo MOSFET technology after proton irradiation. The wafers are annealed to stabilize generated defects in a nitrogen atmosphere at $300^{\circ}C$ for 1 hour because proton irradiation induces a lot of unstable defects in the surface silicon film. Both negative and positive turn-on voltages are shifted to negative direction after the irradiation. The more proton total dose, the more turn on voltage shifts. It means that positive oxide trap charge is generated in the buried oxide(BOX). The minority carrier lifetime which is analyzed by the drain current transient characteristics decreases with the increase of proton total dose. The proton irradiation makes crystal defects in the silicon film, and consequently, the crystal defects reduce the carrier lifetime and mobility. As these results, it can be concluded that pseudo MOSFET is a useful technology for the analysis of irradiated SOI wafer.

Effects of electronic energy deposition on pre-existing defects in 6H-SiC

  • Liao, Wenlong;He, Huan;Li, Yang;Liu, Wenbo;Zang, Hang;Wei, Jianan;He, Chaohui
    • Nuclear Engineering and Technology
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    • v.53 no.7
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    • pp.2357-2363
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    • 2021
  • Silicon carbide is widely used in radiation environments due to its excellent properties. However, when exposed to the strong radiation environment constantly, plenty of defects are generated, thus causing the material performance downgrades or failures. In this paper, the two-temperature model (2T-MD) is used to explore the defect recovery process by applying the electronic energy loss (Se) on the pre-damaged system. The effects of defect concentration and the applied electronic energy loss on the defect recovery process are investigated, respectively. The results demonstrate that almost no defect recovery takes place until the defect density in the damage region or the local defect density is large enough, and the probability of defect recovery increases with the defect concentration. Additionally, the results indicate that the defect recovery induced by swift heavy ions is mainly connected with the homogeneous recombination of the carbon defects, while the probability of heterogeneous recombination is mainly dependent on the silicon defects.