• Title/Summary/Keyword: shared layer

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Empirical Experiments for Convolution Layer Optimization on Multi-GPUs (Multi-GPU 환경에서의 Convolution Layer 최적화 실험)

  • Jiwon Ha;Theodora Adufu;Yoonhee Kim
    • Proceedings of the Korea Information Processing Society Conference
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    • 2023.05a
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    • pp.11-12
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    • 2023
  • GPGPU 환경에서의 ML 모델이 다양한 분야에 지속적으로 활용되면서, 이미지 분할(image segmentation) 연구가 활발하다. multi-GPU 환경에서 성능 최적화를 위하여 병렬화 기법들이 활용되고 있다. 본 연구에서는 multi-GPU 환경에서 U-Net 모델의 전체 수행 시간을 단축하기 위해 convolution 연산을 최적화하는 기법을 적용하는 실험을 진행하였고 shared memory, data parallelism 를 적용하여 82% 성능 향상을 보여주었다.

Design and Verification of LAN Emulation Function for Hybrid Two-Stage AWG based WDM-PON (혼합형 2단 AWG 기반의 WDM-PON을 위한 LAN 에뮬레이션 기능 설계 및 검증)

  • Han, Kyeong-Eun;Yang, Won-Hyuk;Kim, Young-Chon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.3B
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    • pp.91-99
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    • 2008
  • In this paper, we design the function of ULSLE(Upper Layer Shared LAN Emulation) to provide both the efficient LAN service and compatibility with 802.1D bridge in Hybrid two-stage AWG based WDM-PON. The ULSLE layer lies above MAC control layer in order to provide a mean to interface WDM-PON and 802.1D bridge. It also performs LAN emulation based on PON-Tag which is only used to decide both the transmission mode and the destination of frames transmitted from ONUs. That is, the PON-Tag is not used for downstream frames but destination address field in original frame instead. This decreases the processing overhead and complexity caused by PON-Tag at OLT and ONU. The verification of designed ULSLE is performed according to the specific scenarios based on transmission mode and destination using OPNET.

High-throughput Low-complexity Mixed-radix FFT Processor using a Dual-path Shared Complex Constant Multiplier

  • Nguyen, Tram Thi Bao;Lee, Hanho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.101-109
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    • 2017
  • This paper presents a high-throughput low-complexity 512-point eight-parallel mixed-radix multipath delay feedback (MDF) fast Fourier transform (FFT) processor architecture for orthogonal frequency division multiplexing (OFDM) applications. To decrease the number of twiddle factor (TF) multiplications, a mixed-radix $2^4/2^3$ FFT algorithm is adopted. Moreover, a dual-path shared canonical signed digit (CSD) complex constant multiplier using a multi-layer scheme is proposed for reducing the hardware complexity of the TF multiplication. The proposed FFT processor is implemented using TSMC 90-nm CMOS technology. The synthesis results demonstrate that the proposed FFT processor can lead to a 16% reduction in hardware complexity and higher throughput compared to conventional architectures.

A Cluster-based Countermeasure against Media Access Control Layer Attacks in IEEE 802.11 Ad Hoc Networks

  • Shi, Fei;Song, Joo-Seok
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.6 no.6
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    • pp.1565-1585
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    • 2012
  • The characteristics of ad hoc networks, such as the absence of infrastructure, a dynamic topology, a shared wireless medium and a resource-constrained environment pose various security challenges. Most previous studies focused on the detection of misbehavior after it had occurred. However, in this paper we propose a new way of thinking to evade the occurrence of misbehavior. In our scheme, we firstly present a clustering algorithm that employs a powerful analytic hierarchy process methodology to elect a clusterhead for each cluster. The clusterhead in each cluster is then allowed to assign the backoff values to its members, i.e., originators, rather than permitting the originators to choose the backoff values by themselves. Through this media access control layer misbehavior detection mechanism, the misuse of the backoff in the media access control layer in the 802.11 distributed coordination function can be detected.

A COMPARATIVE STUDY ON BLOCKCHAIN DATA MANAGEMENT SYSTEMS: BIGCHAINDB VS FALCONDB

  • Abrar Alotaibi;Sarah Alissa;Salahadin Mohammed
    • International Journal of Computer Science & Network Security
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    • v.23 no.5
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    • pp.128-134
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    • 2023
  • The widespread usage of blockchain technology in cryptocurrencies has led to the adoption of the blockchain concept in data storage management systems for secure and effective data storage and management. Several innovative studies have proposed solutions that integrate blockchain with distributed databases. In this article, we review current blockchain databases, then focus on two well-known blockchain databases-BigchainDB and FalconDB-to illustrate their architecture and design aspects in more detail. BigchainDB is a distributed database that integrates blockchain properties to enhance immutability and decentralization as well as a high transaction rate, low latency, and accurate queries. Its architecture consists of three layers: the transaction layer, consensus layer, and data model layer. FalconDB, on the other hand, is a shared database that allows multiple clients to collaborate on the database securely and efficiently, even if they have limited resources. It has two layers: the authentication layer and the consensus layer, which are used with client requests and results. Finally, a comparison is made between the two blockchain databases, revealing that they share some characteristics such as immutability, low latency, permission, horizontal scalability, decentralization, and the same consensus protocol. However, they vary in terms of database type, concurrency mechanism, replication model, cost, and the usage of smart contracts.

A Trust Management Architecture for TLS

  • Xiaolei Zhang;Hong, Choong-Seon
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.04a
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    • pp.778-780
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    • 2002
  • The TLS protocol suite, which provides transport-layer security far the Internet, has been standardized in the IETF. A TLS session is an association between a client and a server, created by the TLS handshake Protocol. Sessions define a set of cryptographic securi쇼 parameters, which can be shared among multiple connections. The TLS protocol, however, does not address the specific method fur how to manage the existing TLS sessions on the host. This paper proposes an efficient management scheme TLS, based on the principles of trust management.

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A Hybrid Blockchain-based Identity Management Framework for Devices in Microgrid (마이크로그리드에서 장치들을 위한 하이브리드 블록 체인 기반 식별 관리 프레임워크)

  • Cabacas, Regin A.;Ra, In-Ho
    • Proceedings of the Korea Contents Association Conference
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    • 2019.05a
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    • pp.7-8
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    • 2019
  • This paper presents a hybrid blockchain-based Identity Management Framework for devices in Microgrid. It incorporates the use of a Public and Private Blockchain platform to store and authenticate Microgrid device identities. It also emphasizes the shared responsibility of the manufacturers to provide the first layer of authentication for the devices they produce. Identities of each device are stored in the private and public Blockchain and authenticated using physically unclonable functions (PUF) and cryptographic functions.

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Modeling & Analysis of the System Bus on the SoC Platform (SoC 플랫폼에서 시스템 버스의 모델링 및 해석)

  • Cho Young-shin;Lee Je-hoon;Cho Kyoung-rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.35-44
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    • 2005
  • SoC(systnn-on-a-chip) requires high bandwidth system bus for performing multiple functions. Performance of the system is affected by bandwidth of the system bus. In this paper, for efficient management of the bus resource on a SoC platform, we present a latency model of the shared bus organized by multiple layers. Using the latency model, we can analyze latencies of the shared bus on a SoC. Moreover we evaluate a throughput of the bus and compare with needed throughput of the SoC platform including IPs such as MPEG or USB 2.0. And we can use the results as a criteria to find out an optimal bus architecture for the specific SoC design. For verifying accuracy of the proposed model, we compared the latencies with the simulation result from MaxSim tools. As the result of simulation, the accuracy of the IS model for a single layer and multiple layer are over $96\%\;and\;85\%$ respectively.

3-D Information Model for High-speed Railway Infrastructures (고속철도시설물을 위한 3차원정보모델)

  • Shim, Chang-Su;Kim, Deok-Won;Youn, Nu-Ri
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 2008.04a
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    • pp.241-246
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    • 2008
  • Design of a high-speed railway line requires collaboration of heterogeneous application systems and of engineers with different background. Object-based 3D models with metadata can be a shared information model for the effective collaborative design. In this paper, railway infrastructure information model is proposed to enable integrated and inter-operable works throughout the life-cycle of the railway infrastructures, from planning to maintenance. In order to develop the model, object-based 3-D models were built for a 10km railway among Korea high-speed railway lines. The model has basically three information layers for designers, contractors and an owner, respectively. Prestressed concrete box-girders are the most common superstructure of bridges. The design information layer has metadata on requirements, design codes, geometry, analysis and so on. The construction layer has data on drawings, real data for material and products, schedules and so on. The maintenance layer for the owner has the final geometry, material data, products and their suppliers and so on. These information has its own data architecture which is derived from similar concept of product breakdown structure(PBS) and work breakdown structure(WBS). The constructed RIIM for the infrastructures of the high-speed railway was successfully applied to various areas such as design check, structural analysis, automated estimation, construction simulation, virtual viewing, and digital mock-up. The integrated information model can realize virtual construction system for railway lines and dramatically increase the productivity of the whole engineering process.

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Charge Spreading Effect of Stored Charge on Retention Characteristics in SONOS NAND Flash Memory Devices

  • Kim, Seong-Hyeon;Yang, Seung-Dong;Kim, Jin-Seop;Jeong, Jun-Kyo;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.4
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    • pp.183-186
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    • 2015
  • This research investigates the impact of charge spreading on the data retention of three-dimensional (3D) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory where the charge trapping layer is shared along the cell string. In order to do so, this study conducts an electrical analysis of the planar SONOS test pattern where the silicon nitride charge storage layer is not isolated but extends beyond the gate electrode. Experimental results from the test pattern show larger retention loss in the devices with extended storage layers compared to isolated devices. This retention degradation is thought to be the result of an additional charge spreading through the extended silicon nitride layer along the width of the memory cell, which should be improved for the successful 3-D application of SONOS flash devices.