• JSTS:Journal of Semiconductor Technology and Science
• /
• v.17 no.3
• /
• pp.347-353
• /
• 2017

We present a STT-MRAM read-circuit which mitigates the performance degradation caused by offsets from device mismatches. In the circuit, a single current source supplies read-current to both the data and the reference cells sequentially eliminating potential mismatches. Furthermore, an offset-free pre-amplification using a capacitor storing the mismatch information is employed to lessen the effect of the comparator offset. The proposed circuit was implemented using a 130-nm CMOS technology and Monte Carlo simulations of the circuit demonstrate its effectiveness in suppressing the effect of device mismatch.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.99-100
• /
• 2009

SGOI 1T-DRAM cells with various Ge mole fractions were fabricated and compared to the SOI 1T-DRAM cell. SGOI 1T-DRAM cells have a higher leakage current than SOI 1T-DRAM cell at subthreshold region. The leakage current due to crystalline defects and interface states at Si/SiGe increased with Ge mole. This phenomenon causes sensing margin and the retention time of SGOI 1T-DRAMs decreased with increase of Ge mole fraction.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.95-96
• /
• 2009

A fully depleted capacitorless 1-transistor dynamic random access memory (FD 1T-DRAM) based on a sSOI strained-silicon-on-insulator) wafer was investigated. The fabricated device showed excellent electrical characteristics of transistor such as low leakage current, low subthreshold swing, large on/off current ratio, and high electron mobility. The FD sSOI 1T-DRAM can be operated as memory device by the floating body effect when the substrate bias of -15 V is applied, and the FD sSOI 1T-DRAM showed large sensing margin and several milli seconds data retention time.

• Proceedings of the Korean Society of Broadcast Engineers Conference
• /
• 2014.06a
• /
• pp.250-253
• /
• 2014

방송 서비스를 안정적으로 제공하기 위해서는 가시청시간율을 안정적으로 확보하는 것이 중요하다. 이를 위해서는 수신단에서 ToV SNR 부근에서의 추가적인 margin을 확보하는 기술이 요구된다. 기존 방송 시스템은 안테나를 하나만 사용하는 수신 환경을 가정하고 있으므로, 본 논문에서는 하나의 안테나로부터 수신된 신호를 서로 다른 equalizer 기법 2가지를 동시에 적용하여 마치 2개의 수신 안테나부터 신호를 수신한 효과를 얻었고, 그 출력을 weight combining 하여 최종 SNR 이득을 높이는 기술을 제안하였다. 특히, equalizer 기법은 기존에 성능이 우수하다고 알려져 있는 MMSE-DFE 기술과 최근 큰 주목을 받고 있는 compressed Sensing 기반 sparse-DFE 기술을 동시에 사용하였다. Simulation을 통해서 MMSE-DFE 또는 sparse-DFE를 단독으로 사용하는 것보다 두 기법을 가중치 결합을 통해서 사용함으로써 가시청시간율이 크게 향상되는 것을 확인하였다.

• Proceedings of the KSRS Conference
• /
• 2003.11a
• /
• pp.295-297
• /
• 2003

The coastal provinces of South China have been uniquely shaped by various tectonic events. During the midlate Mesozoic tectono-thermal event, the oblique subduction of the Paleo Kula-Pacific plate beneath the Eurasian plate has created a complicated tectonic setting for the whole region. However, the mechanism of this event is not completely understood. In this paper, we discuss the advantages of using LANDSAT TM satellite imagery over a small part of the region - the Mirs Bay Basin which is largely covered by dense vegetation and where limited outcrops is seen. The use of satellite imagery complements field mapping and the result shows a prominent sinistral offset along the eastern margin of the Mirs Bay Basin, which was not previously recognized on the ground.

• Transactions of the Korean Society of Automotive Engineers
• /
• v.8 no.6
• /
• pp.259-266
• /
• 2000

Crash test data from different impact modes and threshold speeds were used to assess the effects of impact conditions on air bag electronic single point sensing (ESPS) activation requirements. The requirements are expressed in terms of the desired sensor activation time based on unbelted driver dummy kinematics. A crash discriminator pre-displacement is introduced to crash recognition algorithm to the ESPS. The new crash recognition algorithm named Velocity Energy Pre-displacement(VEPD) method is developed and the ESPS algorithm based on the VEPD technique is used to assess the ESPS system performance. It is shown that VEPD method correlates very well with desired sensor activation time and meets the activation requirement.

• Proceedings of the KIEE Conference
• /
• 2003.07e
• /
• pp.70-74
• /
• 2003

The buck-boost converter is employed as the variable output PFC power stage. From the loss analysis, this topology has a high efficiency from light load to heavy load. A modified input current sensing scheme is presented to overcome the problem of the insufficient phase margin for the PFC circuit near the maximum output voltage. The variable output PFC circuit has a good performance in the wide output voltage range, under both the Boost mode when the output voltage is high and the Buck+Boost mode when the output voltage is low.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.2
• /
• pp.87-89
• /
• 2006

This paper proposes a sense amplifier with non-volatile memory in order to improve the image quality of LCD by enhancing the matching of the driving voltages between the panel and driver. The sense amplifier having a wide sensing margin and fast response adjusts LCD driver voltage of display driver. The CSTN-LCD with the sense amplifier results improved image quality than that with conventional 6 bit column driver without it.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2005.11a
• /
• pp.80-81
• /
• 2005

Chalcogenide phase change memory has high performance to be next generation memory, because it is a nonvolatile memory processing high programming speed, low programming voltage, high sensing margin, low consumption and long cycle duration. We have developed a sample of PRAM with thermal protected layer. We have investigated the phase transition behaviors in function of process factor including thermal protect layer. As a result, we have observed that set voltage and duration of protect layer are more improved than no protect layer.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2009.05a
• /
• pp.19.1-19.1
• /
• 2009

Phase change random access memory (PRAM)은 large sensing signal margin, fast programming speed, low operation voltage, high speed operation, good data retention, high scalability등을 가지는 가장 유망한 차세대 비휘발성 메모리이다. 현재 PRAM용 상변화 재료로는 주로 Ge2Sb2Te5가 사용되고 있지만 reset 전류가 높고 reliability 가 좋지 않아서 새로운 상변화 물질 연구가 필요하다. AgInSbTe (AIST)는 GST와 더불어 열에 의한 가역적 상변화를 하는 소재로 광기록 매체에서는 기록 속도가 빠르고 동작 특성이 우수하다는 특징이 있다. 본 연구에서는 XRD, 비저항측정등을 통해 온도에 따른 AIST의 물성 및 결정화 특성을 분석하고 나노 소자제작을 통해 그 전기적 특성을 평가하였다.