• Title/Summary/Keyword: semiconductor nanowire

Search Result 87, Processing Time 0.027 seconds

Nano Scale Compositional Analysis by Atom Probe Tomography: II. Applications on Electronic Devices and Nano Materials (Atom Probe Tomography를 이용한 나노 스케일의 조성분석: II. 전자소자 및 나노재료에서의 응용)

  • Jung, Woo-Young;Bang, Chan-Woo;Jang, Dong-Hyun;Gu, Gil-Ho;Park, Chan-Gyung
    • Applied Microscopy
    • /
    • v.41 no.2
    • /
    • pp.89-98
    • /
    • 2011
  • Atom Probe Tomography (APT) can provide 3-dimensional information such as position and chemical composition with atomic resolution. Despite the ability of this technique, APT could not be applied for poor conductive materials such as semiconductor. Recently APT has dramatically developed by applying the laser pulsing and combining with Focused Ion Beam (FIB). The invention and combination of these techniques make possible site-specific sample preparation and permit the investigation of various materials including insulators. In this paper, we introduced the recently achieved state of the art applications of APT focusing on Si based FET devices, LED devices, low dimensional materials.

GaAs-Carbon Nanotubes Nanocomposite: Synthesis and Field-Emission Property (갈륨비소-탄소나노튜브 복합체 제작과 전계방출특성)

  • Lim, Hyun-Chul;Chandrasekar, P.V.;Chang, Dong-Mi;Ahn, Se-Yong;Jung, Hyuk;Kim, Do-Jin
    • Korean Journal of Materials Research
    • /
    • v.20 no.4
    • /
    • pp.199-203
    • /
    • 2010
  • Hybridization of semiconductor materials with carbon nanotubes (CNTs) is a recent field of interest in which new nanodevice fabrication and applications are expected. In this work, nanowire type GaAs structures are synthesized on porous single-wall carbon nanotubes (SWCNTs) as templates using the molecular beam epitaxy (MBE) technique. The field emission properties of the as-synthesized products were investigated to suggest their potential applications as cold electron sources, as well. The SWCNT template was synthesized by the arc-discharge method. SWCNT samples were heat-treated at $400^{\circ}C$ under an $N_2/O_2$ atmosphere to remove amorphous carbon. After heat treatment, GaAs was grown on the SWCNT template. The growth conditions of the GaAs in the MBE system were set by changing the growth temperatures from $400^{\circ}C$ to $600^{\circ}C$. The morphology of the GaAs synthesized on the SWCNTs strongly depends on the substrate temperature. Namely, nano-crystalline beads of GaAs are formed on the CNTs under $500^{\circ}C$, while nanowire structures begin to form on the beads above $600^{\circ}C$. The crystal qualities of GaAs and SWCNT were examined by X-ray diffraction and Raman spectra. The field emission properties of the synthesized GaAs nanowires were also investigated and a low turn-on field of $2.0\;V/{\mu}m$ was achieved. But, the turn-on field was increased in the second and third measurements. It is thought that arsenic atoms were evaporated during the measurement of the field emission.

Electrical Properties of Flexible Field Effect Transistor Devices Composed of Si Nanowire by Electroless Etching Method (무전해 식각법으로 합성한 Si 나노와이어 Field Effect Transistor 유연소자의 특성)

  • Lee, Sang-Hoon;Moon, Kyeong-Ju;Hwang, Sung-Hwan;Lee, Tae-Il;Myoung, Jae-Min
    • Korean Journal of Materials Research
    • /
    • v.21 no.2
    • /
    • pp.115-119
    • /
    • 2011
  • Si Nanowire (NW) field effect transistors (FETs) were fabricated on hard Si and flexible polyimide (PI) substrates, and their electrical characteristics were compared. Si NWs used as channels were synthesized by electroless etching method at low temperature, and these NWs were refined using a centrifugation method to get the NWs to have an optimal diameter and length for FETs. The gate insulator was poly(4-vinylphenol) (PVP), prepared using a spin-coating method on the PI substrate. Gold was used as electrodes whose gap was 8 ${\mu}m$. These gold electrodes were deposited using a thermal evaporator. Current-voltage (I-V) characteristics of the device were measured using a semiconductor analyzer, HP-4145B. The electrical properties of the device were characterized through hole mobility, $I_{on}/I_{off}$ ratio and threshold voltage. The results showed that the electrical properties of the TFTs on PVP were similar to those of TFTs on $SiO_2$. The bending durability of SiNWs TFTs on PI substrate was also studied with increasing bending times. The results showed that the electrical properties were maintained until the sample was folded about 500 times. But, after more than 1000 bending tests, drain current showed a rapid decrease due to the defects caused by the roughness of the surface of the Si NWs and mismatches of the Si NWs with electrodes.

Thermal Conductivity Measurement of Ge-SixGe1-x Core-Shell Nanowires Using Suspended Microdevices (뜬 마이크로 디바이스를 이용한 Ge-SixGe1-x Core-Shell Nanowires 의 열전도율 측정)

  • Park, Hyun Joon;Nah, Jung hyo;Tutuc, Emanuel;Seol, Jae Hun
    • Transactions of the Korean Society of Mechanical Engineers B
    • /
    • v.39 no.10
    • /
    • pp.825-829
    • /
    • 2015
  • Theoretical calculations suggest that the thermoelectric figure of merit (ZT) can be improved by introducing a core-shell heterostructure to a semiconductor nanowire because of the reduced thermal conductivity of the nanowire. To experimentally verify the decrease in thermal conductivity in core-shell nanowires, the thermal conductivity of Ge-SixGe1-x core-shell nanowires grown by chemical vapor deposition (CVD) was measured using suspended microdevices. The silicon composition (Xsi) in the shells was measured to be about 0.65, and the remainder of the germanium in the shells was shown to play a role in decreasing defects originating from the lattice mismatch between the cores and shells. In addition to the standard four-point current- voltage (I-V) measurement, the measurement configuration based on the Wheatstone bridge was attempted to enhance the measurement sensitivity. The measured thermal conductivity values are in the range of 9-13 W/mK at room temperature and are lower by approximately 30 than that of a germanium nanowire with a comparable diameter.

Optically transparent and electrically conductive indium-tin-oxide nanowires for transparent photodetectors

  • Kim, Hyunki;Park, Wanghee;Ban, Dongkyun;Kim, Hong-Sik;Patel, Malkeshkumar;Yadav, Pankaj;Kim, Joondong
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2016.02a
    • /
    • pp.390.2-390.2
    • /
    • 2016
  • Single crystalline indium-tin-oxide (ITO) nanowires (NWs) were grown by sputtering method. A thin Ni film of 5 nm was coated before ITO sputtering. Thermal treatment forms Ni nanoparticles, which act as templates to diffuse Ni into the sputtered ITO layer to grow single crystalline ITO NWs. Highly optical transparent photoelectric devices were realized by using a transparent metal-oxide semiconductor heterojunction by combining of p-type NiO and n-type ZnO. A functional template of ITO nanowires was applied to this transparent heterojunction device to enlarge the light-reactive surface. The ITO NWs/n-ZnO/p-NiO heterojunction device provided a significant high rectification ratio of 275 with a considerably low reverse saturation current of 0.2 nA. The optical transparency was about 80% for visible wavelengths, however showed an excellent blocking UV light. The nanostructured transparent heterojunction devices were applied for UV photodetectors to show ultra fast photoresponses with a rise time of 8.3 mS and a fall time of 20 ms, respectively. We suggest this transparent and super-performing UV responser can practically applied in transparent electronics and smart window applications.

  • PDF

Synthesis of Thin Film Type Cu/ZnO Nanostructure Catalysts for Development of Methanol Micro Reforming System (마이크로 개질기 개발을 위한 박막형 Cu/ZnO 나노구조 촉매 합성)

  • Yeo, Chan Hyuk;Kim, Yeon Su;Im, Yeon Ho
    • Transactions of the Korean hydrogen and new energy society
    • /
    • v.24 no.3
    • /
    • pp.193-199
    • /
    • 2013
  • In this work, thin film type Cu/ZnO nanostructure catalysts were fabricated by several synthetic routes in order to maximize the performance of the micro reforming system. For this work, various Cu/ZnO nanostructure catalysts could be synthesized by means of four approaches which are chemical vapor method, wet solution method and their hybrid method. The reforming performance of these as-synthetic catalysts was evaluated as compared to the conventional catalysts. Among the as-synthetic nanostructures, sphere type catalysts with specific surface of $18.6m^2/g$ showed the best performance of hydrogen production rate of 30ml/min at the feed rate of 0.2ml/min. This work will give the first insight on thin film type Cu/ZnO nanostructure catalyst for micro reforming system for hydrogen production of portable electronic systems.

무전해 식각법으로 합성된 Si 나노와이어를 이용한 CMOS 인버터

  • Mun, Gyeong-Ju;Lee, Tae-Il;Lee, Sang-Hun;Hwang, Seong-Hwan;Myeong, Jae-Min
    • Proceedings of the Materials Research Society of Korea Conference
    • /
    • 2011.10a
    • /
    • pp.22.2-22.2
    • /
    • 2011
  • Si 나노와이어를 합성하는 다양한 방법들 중에서 Si 기판을 나노와이어 형태로 제작하는 무전해 식각법은 쉽고 간단하기 때문에 최근 많은 연구가 진행되고 있다. 무전해 식각법을 이용한 Si 나노와이어는 p 또는 n형의 전기적 특성을 갖는 Si 기판의 도핑농도에 따라 원하는 전기적 특성을 갖는 나노와이어를 얻을 수 있을 것이라는 기대가 있었지만 n형으로 제작된 나노와이어의 경우 식각에 의한 표면의 거칠기 때문에 그 특성을 나타내지 못하는 문제점을 가지고 있다. 본 연구에서는 무전해 식각법을 이용하여 p와 n형 나노와이어를 합성하고 field-effect transistors (FETs) 소자를 제작하여 각각의 특성을 구현하였다. 나노와이어와 절연막 사이의 계면 결함을 최소화하기 위하여 poly-4-vinylphenol (PVP) 고분자 절연막에 나노와이어를 삽입시킨 형태로 소자를 제작하였고, 특히 n형 나노와이어의 표면을 보다 평평하게 하기 위하여 열처리를 진행 하였다. 이렇게 각각의 특성이 구현된 나노와이어를 이용하여 soft-lithography 공정을 통해 complementary metal-oxide semiconductor (CMOS) 구조의 인버터 소자를 제작하였으며 그 전기적 특성을 평가하였다.

  • PDF

Negative Differential Resistance Devices with Ultra-High Peak-to-Valley Current Ratio and Its Multiple Switching Characteristics

  • Shin, Sunhae;Kang, In Man;Kim, Kyung Rok
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.13 no.6
    • /
    • pp.546-550
    • /
    • 2013
  • We propose a novel negative differential resistance (NDR) device with ultra-high peak-to-valley current ratio (PVCR) by combining pn junction diode with depletion mode nanowire (NW) transistor, which suppress the valley current with transistor off-leakage level. Band-to-band tunneling (BTBT) Esaki diode with degenerately doped pn junction can provide multiple switching behavior having multi-peak and valley currents. These multiple NDR characteristics can be controlled by doping concentration of tunnel diode and threshold voltage of NW transistor. By designing our NDR device, PVCR can be over $10^4$ at low operation voltage of 0.5 V in a single peak and valley current.

NANOCAD Framework for Simulation of Quantum Effects in Nanoscale MOSFET Devices

  • Jin, Seong-Hoon;Park, Chan-Hyeong;Chung, In-Young;Park, Young-June;Min, Hong-Shick
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.6 no.1
    • /
    • pp.1-9
    • /
    • 2006
  • We introduce our in-house program, NANOCAD, for the modeling and simulation of carrier transport in nanoscale MOSFET devices including quantum-mechanical effects, which implements two kinds of modeling approaches: the top-down approach based on the macroscopic quantum correction model and the bottom-up approach based on the microscopic non-equilibrium Green’s function formalism. We briefly review these two approaches and show their applications to the nanoscale bulk MOSFET device and silicon nanowire transistor, respectively.

Synthesis of Vertically Aligned SiNW/Carbon Core-shell Nanostructures

  • Kim, Jun-Hui;Kim, Min-Su;Kim, Dong-Hwan
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2014.02a
    • /
    • pp.488.2-488.2
    • /
    • 2014
  • Carbon-based materials such as carbon nanotubes and graphene have emerged as promising building blocks in applications for nanoelectronics and energy devices due to electrical property, ease of processability, and relatively inert electrochemistry. In recent years, there has been considerable interest in core-shell nanomaterials, in which inorganic nanowires are surrounded by inorganic or organic layers. Especially, carbon encapsulated semiconductor nanowires have been actively investigated by researchers in lithium ion batteries. We report a method to synthesize silicon nanowire (SiNW) core/carbon shell structures by chemical vapor deposition (CVD), using methane (CH4) as a precursor at growth temperature of $1000{\sim}1100^{\circ}C$. Unlike carbon-based materials synthesized via conventional routes, this method is of advantage of metal-catalyst free growth. We characterized these materials with FE-SEM, FE-TEM, and Raman spectroscopy. This would allow us to use these materials for applications ranging from optoelectronics to energy devices such as solar cells and lithium ion batteries.

  • PDF