• KSII Transactions on Internet and Information Systems (TIIS)
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• 제18권8호
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• pp.2366-2380
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• 2024

In this study, a high-speed template matching system is proposed for wafer-vision alignment. The proposed system is designed to rapidly locate markers in semiconductor equipment used for wafer-vision alignment. We optimized and implemented a template-matching algorithm for the high-speed processing of high-resolution wafer images. Owing to the simplicity of wafer markers, we removed unnecessary components in the algorithm and designed the system using a field-programmable gate array (FPGA) to implement high-speed processing. The hardware blocks were designed using the Xilinx ZCU104 board, and the pyramid and matching blocks were designed using programmable logic for accelerated operations. To validate the proposed system, we established a verification environment using stage equipment commonly used in industrial settings and reference-software-based validation frameworks. The output results from the FPGA were transmitted to the wafer-alignment controller for system verification. The proposed system reduced the data-processing time by approximately 30% and achieved a level of accuracy in detecting wafer markers that was comparable to that achieved by reference software, with minimal deviation. This system can be used to increase precision and productivity during semiconductor manufacturing processes.

• 산업공학
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• 제10권1호
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• pp.15-22
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• 1997

In semiconductor manufacturing, the probe process between fabrication and assembly process is constrained mostly by the equipment capacity because most products pass through the similar procedures. The probe process is usually performed in a batch mode with relatively short cycle times. The capability of the probe process can be determined by the optimal combination of the equipments and the products. A probe line usually has several types of equipment with different capacity. In this study, the probe line is modeled in terms of capacity to give the efficient planning and control procedure. For the practical usage, the hierarchical capacity planning procedure is used. First, a monthly capacity plan is made to meet the monthly production plan of each product. Secondly, the daily capacity planning is performed by considering the monthly capacity plan and the daily fabrication output. Simple heuristic algorithms for daily capacity planning are developed and some experimental results are shown.

• 지식경영연구
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• 제3권2호
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• pp.49-70
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• 2002

The purpose of this study is to investigate the process and its influencing factors of technological capability building in a small and medium-sized capital goods sector. This paper first reviews the influencing factors of accumulating technological capability-technology trajectory, technology sources, technological capability, technological learning, technology strategy, and entrepreneurship. The paper then presents the integrative model of technological capability building. The experience of Mirae Corporation, the first generation of venture company in Korea, is also discussed as a case in point to analyse the process of technological capability building in a small and medium-sized capital goods company. Finally, the implications and limitations of the study arc discussed.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.230-233
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• 2007

A system of anodic process of aluminum thin film has implemented for nanofabrication. The manufactured equipment consists of three main parts: chiller, reaction bath and power supply. The chiller module consists of refrigeration compressor, copper tube and coolant with a thermostat. The reaction bath has kept in same temperature as a thermodynamic canonical ensemble system during the anodic reaction process. The magnetic bar has stirred oxalic acid in bath for uniform reaction. The DC power supply has applied into two electrodes, aluminum for anode and platinum for cathode in the oxalic acid. The anodization process results in the formation of nanoporous thin films.

• 반도체디스플레이기술학회지
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• 제2권2호
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• pp.25-30
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• 2003

In the case of a vibration sensitive equipment, it require a vibration free environment to provide its proper function. Especially, lithography and inspection device, which have sub-nanometer class high accuracy and resolution, have come to necessity for producing more improved Giga Class semi conductor wafers. This high technology equipments require very strict environmental vibration criteria in proportion to the accuracy of the manufacturing. In this paper, the dynamic analysis and modal test were performed to evaluate the dynamic properties of the constructing clean room structure. Based on these results, a structural dynamic modification(SDM) were required to satisfiy the vibration allowable limit for pression machine. Therefore, in order to improve the dynamic stiffness of clean room structure, the VSD system which can control the force applied on structure, were adopted and its utility were proved from dynamic test results of the improved structure after a modification work.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.293-293
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• 2000

The SECS(SEMI Equipment Communications Standard) is a standard protocol for communication between equipments and a host in semiconductor processes. This paper proposes the implementation of the HSMS(High-speed SECS Message Services) as an interface for transmission of the SECS messages and SECS-II containing message contents defined as an SEMI standard. The HSMS driver is implemented as a type of the daemon program and several DLL files. The SECS-II composes of the SML(SECS Message Language) file defining the SECS messages, the SML translator being able to interpret and transform the SML, and the data index table being able to refer to SECS messages. We also define the shared parameter to exchange the HSMS header and SECS message between the HSMS and the SECS-II. Eventually, to show the effectiveness of the proposed drivers, we test the SECS communications between equipments and a host using the implemented communication programs.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2006년도 춘계학술대회
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• pp.255-258
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• 2006

In this paper, the new method which is monitoring quantity of particles using by ion-counter has been developed. ISPM system is composed by Gerdien type ion-counter (house-made), DC power supply and electrometer. Ion-counter applied positive voltage could detect only positive charged particles. Therefore charged particles to Boltzmann equilibrium distribution or to some identified charge distribution can be detected by ion-counter. Ion-counter could install on the exhaust line of process equipment since pressure loss is structurally low. ISPM system has been certified by comparison with the result of SMPS (Scanning Mobility Particle Sizer) system. The relation coefficiency is above 0.98 about $20{\sim}300nm$ particles with identified charge distribution under $0.1{\sim}10.0$ Torr.

• 반도체디스플레이기술학회지
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• 제10권4호
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• pp.15-20
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• 2011

The lithography system installed inside precision industry's (e.g. TFT-LCD) production factories are increasing in size, thereby increasing its dynamic load along with it. Such condition causes vibration within the area where the system is installed, which then negatively affects the production line to produce defective products. To prevent this type of situation, the facilities should adopt dynamic design that considers the lithography system's dynamic load. This study predicts the maximum value allowed for dynamic stiffness (which is a ratio of vibration response against a single unit of the dynamic load) of the lithography system and explains the result of its application on actual structures inside the facilities.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2004년도 춘계학술대회 발표 논문집
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• pp.195-201
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• 2004

In design stage of high precision manufacture/inspect ion FAB building, it is necessary to investigate the vibration allowable limits of high precision equipment and to study a structure dynamic characteristics of C/R and Sub-structure in order to provide a structure vibration environment to satisfy thess allowable limits. The aim of this study is to investigate the dynamic characteristics of PC-Type mock-up structures designed for next TFT LCD FAB through vibration measurement and analysis procedure, therefore, to provide a proper dynamic structure design for high precision manufacture/inspection work process, which satisfy thess allowable limits.

• 반도체디스플레이기술학회지
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• 제10권2호
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• pp.1-5
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• 2011

In recent years, worldwide production of solar wafers increased rapidly. Therefore, the solar wafer technology in the developed countries already has become an industry, and related industries such as solar wafer manufacturing equipment have developed rapidly. In this paper we propose the color classification method of the polycrystalline solar wafer that needed in manufacturing equipment. The solar wafer produced in the manufacturing process does not have a uniform color. Therefore, the solar wafer panels made with insensitive color uniformity will fall off the aesthetics. Gaussian mixture models (GMM) are among the most statistically mature methods for clustering and we use the Gaussian mixture models for the classification of the polycrystalline solar wafers. In addition, we compare the performance of the color feature vector from various color space for color classification. Experimental results show that the feature vector from YCbCr color space has the most efficient performance and the correct classification rate is 97.4%.