• Title/Summary/Keyword: semiconductor equipment

Search Result 865, Processing Time 0.028 seconds

Fabrication of Nanopatterns by Using Diblock Copolymer

  • KANG GIL BUM;KIM SEONa-IL;KIM YONG TAE;KIM YOUNG HHAN;PARK MIN CHUL;KIM SANG JIN;LEE CHANG WOO
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
    • /
    • 2005.09a
    • /
    • pp.183-187
    • /
    • 2005
  • Thin films of diblock copolymers may be suitable for semiconductor device applications since they enable patterning of ordered domains with dimensions below photolithographic resolution over wafer-scale area. We obtained nanometer-scale cylindrical structure of dibock copolymer of polystyrene-block-poly(methylmethacrylate), PS-b-PMMA, also demonstrate pattern transfer of the nanoporous polymer using both reactive ion etching. The size of fabricated naonoholes were about 10 nm. Fabricated nanopattern surface was observed by field emission scanning electron microscope (FESEM).

  • PDF

A Study on the Development of Qualification for Semiconductor Machine Maintenance (반도체장비유지보수 자격개발에 관한 연구)

  • Kang, Seok-Ju
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.13 no.6
    • /
    • pp.2472-2478
    • /
    • 2012
  • This research is aiming to develop Semiconductor equipment maintenance certification course to train qualified maintenance experts more effectively requested in related semiconductor industry. In the course of research, we adopted diverse research technique such as interview, on-spot investigation, documentary references to analyze current status of related training facilities, and forecast the population of test applicants. We analyzed similar certification course(Craftsman SMT, Industrial Engineer SMT, Craftsman Mechatronics, Industrial Enginee Mechatronics, et) as reference to set up job objectives and curriculum of semiconductor equipment maintenance certification. We conducted survey on expectations on newly created certificate, presented evaluation standard and objective of test, and preliminary writing test and demonstration test. Based on the result of various research, we were able to present training program for semiconductor equipment maintenance certification and set the assessment standard of qualification exam.

Understanding of RF Impedance Matching System Using VI-Probe

  • Lee, Ji Ha;Park, Hyun Keun;Lee, Jungsoo;Hong, Snag Jeen
    • Journal of the Semiconductor & Display Technology
    • /
    • v.19 no.3
    • /
    • pp.43-48
    • /
    • 2020
  • The demand for stable plasma has been on the rise because of the increased delivery power amount in the chamber for improving productivity, and fast and accurate plasma impedance matching become a crucial performance measure for radio frequency (RF) power system in semiconductor manufacturing equipment. In this paper, the overall impedance matching was understood, and voltage and current values were extracted with voltage - current (VI) probe to measure plasma impedance in real-time. Actual matching data were analyzed to derive calibration coefficient for V and I measurements to understand the characteristics of VI probe, and we demonstrated the tendency of RF impedance matching according to changes in load impedance. This preliminary empirical research can contribute to fast RF matching as well as advanced equipment control for the next level of detailed investigation on embedded system based-RF matching controller.

Conveyor Capability Simulation for Semiconductor Diffusion Area (반도체 확산공정에서의 컨베이어 적정속도와 길이를 구하는 시뮬레이션)

  • 박일석;이칠기
    • Journal of the Korea Society for Simulation
    • /
    • v.11 no.3
    • /
    • pp.59-65
    • /
    • 2002
  • Semiconductor wafer fabrication is a business of high capital investment and fast changing nature. To be competitive, the production in a fab needs to be effectively planned and scheduled starting from the ramping up phase, so that the business goals such as on-time delivery, high output volume and effective use of capital intensive equipment can be achieved. Project executed that use conveyor in bay semiconductor A line. But conveyor capability is lacking and rundown happened in equipment. Do design without normal simulation and conveyor system failed. The comparison is peformed through simulation using .AutoMod a window 98 based discrete system simulation software, as a tool for comparing performance of proposed layouts. In this research estimate optimum conveyor capability, there is the purpose.

  • PDF

Power Enhanced Design of Robust Control Charts for Autocorrelated Processes : Application on Sensor Data in Semiconductor Manufacturing (검출력 향상된 자기상관 공정용 관리도의 강건 설계 : 반도체 공정설비 센서데이터 응용)

  • Lee, Hyun-Cheol
    • Journal of Korean Society of Industrial and Systems Engineering
    • /
    • v.34 no.4
    • /
    • pp.57-65
    • /
    • 2011
  • Monitoring auto correlated processes is prevalent in recent manufacturing environments. As a proactive control for manufacturing processes is emphasized especially in the semiconductor industry, it is natural to monitor real-time status of equipment through sensor rather than resultant output status of the processes. Equipment's sensor data show various forms of correlation features. Among them, considerable amount of sensor data, statistically autocorrelated, is well represented by Box-Jenkins autoregressive moving average (ARMA) model. In this paper, we present a design method of statistical process control (SPC) used for monitoring processes represented by the ARMA model. The proposed method shows benefits in the power of detecting process changes, and considers robustness to ARMA modeling errors simultaneously. We prove benefits through Monte carlo simulation-based investigations.

An Exploratory Study of the Effect of Buyer-supplier Relationship on Supplier's Innovation : Cases from Semiconductor Equipment Industry (구매자-공급자 관계가 공급자 혁신에 미치는 영향에 대한 탐색적 연구 : 반도체 장비 산업 사례를 중심으로)

  • Lee, Kangmun;Cho, Dong-sung;Lee, Yun-cheol
    • Knowledge Management Research
    • /
    • v.10 no.4
    • /
    • pp.163-183
    • /
    • 2009
  • Numerous studies in the field of buyer-supplier relationship research have focused on the buyer's performance. In contrast, supplier's performance has been paid relatively little attention by researchers, especially the research about the supplier's innovation in the relationship is still in its early stage. In this paper, we examine the relation between the attribute of buyer-supplier relationship and the attribute of supplier's innovation through case research. We define the attribute of buyer-supplier relationship as 'tie strength' (Granovetter, 1973), and the attribute of supplier's innovation as 'exploitation or exploration' (March, 1991). We selected the semiconductor equipment industry of U.S.A, Japan and Korea and firm (JUSUNG Engineering) as cases that examine the relation. We found that a strong tie relationship is positively associated with supplier's exploitation based innovation, and a weak tie relationship is positively related to it's exploration based innovation in this research also. In addition, we could verify reduction of strong tie relationship cause supplier's organizational change.

  • PDF

A Study on the Change of Si Thin Film Characteristics to Find Design Rules for Sputtering Equipment (스퍼터 장비의 설계 룰을 찾기 위한 Si박막 특성 변화 연구)

  • Kim, Bo-Young;Kang, Seo Ik
    • Journal of the Semiconductor & Display Technology
    • /
    • v.19 no.3
    • /
    • pp.100-105
    • /
    • 2020
  • Recently, as display and semiconductor devices have been miniaturized and highly integrated, there is a demand for optimization of the structural characteristics of the thin film accordingly. The sputtering device has the advantage of stably obtaining a desired thin film depending on the material selected for the target. However, due to the structural characteristics of the sputtering equipment, the structural characteristics of the film may be different depending on the incidence angle of the sputtering target material to the substrate. In this study, the characteristics of the thin film material according to the scattering angle of the target material and the incidence position of the substrate were studied to find the optimization design rule of the sputtering equipment. To this end, a Si thin film of 1 ㎛ or less was deposited on the Si(100) substrate, and then the microstructure, reflectance, surface roughness, and thin film crystallinity of the thin film formed for each substrate location were investigated. As a result of the study, it was found that as the sputter scattering angle increased and the substrate incident angle decreased, the gap energy along with the surface structure of the thin film increased from 1.47 eV to 1.63 eV, gradually changing to a non-conductive tendency.

Design and Analysis of the Basic Components for the Semiconductor Wafer Cleaning Equipment Monitoring System (반도체 웨이퍼 세정 장비 모니터링 시스템을 위한 기본 요소의 분석 및 설계)

  • Kang, Ho-Seok;Rim, Seong-Rak
    • The Transactions of the Korea Information Processing Society
    • /
    • v.7 no.1
    • /
    • pp.115-125
    • /
    • 2000
  • In this paper, we suggest the basic components of monitoring system for the semiconductor wafer cleaning equipment and a monitoring system model based on these components. Basic component is defined as a mandatory function which consists of communication with the control system, user interface, communication with the remote monitoring system, management of monitoring data and inter-task communication. We have defined the function of each component and the relation among them, and designed each component as a task. To evaluate the validity of the suggested model, we have implemented the basic components using the Visual C++ on Windows NT and applied them to the Monitoring System for the semiconductor wafer cleaning equipment.

  • PDF

A study on friction and stress analysis of wedge mount leveler in Semi-Conductor Sub-Fab (반도체 Sub-Fab 용 웨지 마운트 레벨러(Wdge Mount Leveler)의 마찰과 응력에 관한 연구)

  • Min, Kyung-Ho;Song, Ki-Hyeok;Hong, Kwang-Pyo
    • Design & Manufacturing
    • /
    • v.11 no.2
    • /
    • pp.25-28
    • /
    • 2017
  • Semiconductor equipment manufacturers desire to enhance efficiency of Sub Fab to increase semiconductor productivity. For this reason, Sub Fab equipment manufacturers are developing Integrated System that combined modules with multiple facilities. Integrated System is required to apply Mount Leveler of Wedge Type in compliance with weight increase compared with existing single equipment and product shape change. This thesis analyzes main design variables of components of Wedge Mount Leveler and carries out structure analysis using ANSYS, finite element analysis program Analysis shows that main design variables of components of Wedge Mount Leveler has self-locking condition by friction force of Wedge and adjusting bolt. Each friction force hinges upon Wedge angle and Friction Coefficient of contact surface and upon the thread angle and Friction Coefficient of contact surface. Also, as a result of carrying out structure analysis of Wedge Mount Leveler, deflection and stress appears in different depending on the height of the level.

The Operational Optimization of Semiconductor Research and Development Fabs by FAB-wide Scheduling (FAB-Wide 스케줄링을 통한 반도체 연구라인의 운용 최적화)

  • Kim, Young-Ho;Lee, Jee-Hyong;Sun, Dong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.57 no.4
    • /
    • pp.692-699
    • /
    • 2008
  • Semiconductor research and development(R&D) fabs are very different than production fabs in many ways such as the scales of production, job priority, production methods, and performance measures. Efficient operations of R&D fabs are very important to the development of new product, process stability, high yield, and ultimately company competitiveness. This paper proposes the fab-wide scheduling method for operational optimization of the R&D fabs. Most scheduling systems of semiconductor fabs have only focused on maximizing throughput of each separated areas without considering WIP(works in process) flows of entire fab. In this paper, we proposes the a fab-wide scheduling system which schedules all lots to entire fab equipment at once. We develop the MIP(mixed integer programing) model which allocates the lots to production equipment considering many constraints of all processes and the CP(constraint programming) model which determines the sequences of the lots in the production equipment. The proposed FAB-wide scheduling model is applied to the newly constructed R&D fab. As a result, we have accomplished the system based automated job reservation, decrease of the hot lot delay, increase of the queue time satisfaction, the high throughput by maximizing the batch sizes, decrease of the WIP TAT(Turn Around Time).