• Title/Summary/Keyword: selected mapping

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A Study of Reuse Module Generation Algorithm consider the Power Consumption for FPGA Technology Mapping (FPGA 기술 매핑을 위한 소모 전력을 고려한 재사용 모듈 생성 알고리즘에 관한 연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.12
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    • pp.2306-2310
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    • 2007
  • In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm, consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.

Partial Shift Mapping for PAPR Reduction with Low Complexity in OFDM Systems

  • Ouyang, Xing;Jin, Jiyu;Jin, Guiyue;Wang, Zhisen
    • ETRI Journal
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    • v.34 no.2
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    • pp.268-271
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    • 2012
  • The high peak-to-average power is one of the main drawbacks in OFDM systems. This letter proposes a partial shift mapping (PSM) method for peak power reduction in OFDM systems. By utilizing the properties of the discrete Fourier transform, the proposed method generates a set of candidate signals without additional complex multiplication and selects the one with minimum peak power for transmission. Analyses and simulations confirm that the PSM method achieves satisfactory peak power reduction performance and low complexity compared with other kindred methods, for example, selected mapping and partial transmit sequences.

A Study of FPGA Modul Algorithm consider the Power Consumption for Digital Technology (디지털 기술의 소모전력을 위한 FPGA 모듈 알고리즘에 관한연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.9
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    • pp.1851-1857
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    • 2009
  • In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.

Design of Recursive Selected Mapping HCOC Multi-Code Spread Spectrum System for high-speed data transmission (초고속 전송을 위한 Recursive Selected Mapping HCOC Multi-Code Spread Spectrum 시스템 설계)

  • Kong, Hyung-Yun;Choi, Jeoung-Ho;Seo, Min-Gu;Jeong, Hwi-Jae
    • Proceedings of the Korea Information Processing Society Conference
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    • 2005.11a
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    • pp.1279-1282
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    • 2005
  • 본 논문은 초고속 전송을 위해 설계된 HCOC(High Capacity Orthogonal Code) 기술을 적용한 Multi-Code Spread Spectrum System에서 발생할 수 있는 PAPR(Peck to Average power Ratio) 문제해결을 위한 연구이다. H(HCOC)MC-SS 시스템의 PAPR 감소를 위해 기본적인 SLM(Selected Mapping) 기법을 적용하였으며, 또한 SLM 기법의 단점인 많은 계산량 감소를 위해 Recursive 방법을 적용한 Recursive SLM HMC-SS 시스템을 제안하였다. 컴퓨터 시뮬레이션을 통해 제안하는 시스템을 검증하였으며, 또한 초고속 전송을 위한 16 QAM-SS 시스템과 $4{\times}4$ HMC-SS 시스템의 성능을 비교 분석하였다.

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Selected Mapping without Side Information at the Receiver (수신기에서 부가정보가 필요 없는 Selected Mapping 기법)

  • Jang, Chanki;Yoon, Eunchul
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.9
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    • pp.1710-1718
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    • 2015
  • Selected mapping (SLM) is an effective scheme to reduce the peak to average power ratio (PAPR) of an orthogonal frequency division multiplexing (OFDM) system. For data recovery, the receiver needs to know the side information (SI) on the scrambling sequence selected by the transmitter. In this paper, a new SLM scheme is proposed, which can reduce implementation complexity substantially by allowing the receiver to recover the data without SI. In the proposed SLM method, the concept of virtual channel corresponding to the convolution of the multipath channel and the inverse discrete fourier transform (IDFT) of the scrambling sequence is assumed. The receiver can recover the data without SI by using the virtual channel estimated with pilot signals. It is shown by simulation that the proposed SLM has PAPR reduction and BER performances similar to the previous SLM schemes while it can reduce implementation complexity substantially.

Minimizing Leakage of Sequential Circuits through Flip-Flop Skewing and Technology Mapping

  • Heo, Se-Wan;Shin, Young-Soo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.4
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    • pp.215-220
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    • 2007
  • Leakage current of CMOS circuits has become a major factor in VLSI design these days. Although many circuit-level techniques have been developed, most of them require significant amount of designers' effort and are not aligned well with traditional VLSI design process. In this paper, we focus on technology mapping, which is one of the steps of logic synthesis when gates are selected from a particular library to implement a circuit. We take a radical approach to push the limit of technology mapping in its capability of suppressing leakage current: we use a probabilistic leakage (together with delay) as a cost function that drives the mapping; we consider pin reordering as one of options in the mapping; we increase the library size by employing gates with larger gate length; we employ a new flipflop that is specifically designed for low-leakage through selective increase of gate length. When all techniques are applied to several benchmark circuits, leakage saving of 46% on average is achieved with 45-nm predictive model, compared to the conventional technology mapping.

A New Selected Mapping Scheme without Side Information Using Cross-Correlation (상호 상관을 이용한 부가정보가 필요 없는 Selected Mapping 수신방법 제안)

  • Lee, Jong-keun;Chang, Dae-ig
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.4
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    • pp.739-746
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    • 2017
  • Orthogonal frequency division multiplexing(OFDM) systems have many advantages. However, OFDM systems are much affected by a nonlinear distortion because those systems have a high peak to average power ratio(PAPR) value. A selected mapping technology was suggested to reduce a PAPR value. The technology does not have data loss but receivers need side information to know modified phase sequence. Therefore, side information causes decreased a transmission efficiency. In this paper, we suggest a blind SLM receiver using a cross correlation technology. This receiver does not require side information. The proposed blind SLM receiver calculates sums of cross-correlation between transmitted pilot signals multiplied by each phase sequence and received pilot signals. So, this receiver detects side information which has a maximum sum cross-correlation value. We compared our proposed SLM receiver to a conventional blind SLM receiver through bit error rate(BER) and side information error rate(SIER) performances. Simulation results show that the proposed SLM receiver has improved BER and SIER performances than the conventional SLM receiver.

A Study of Algorithm for Digital Technology (디지털 기술의 알고리즘에 관한 연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of Digital Contents Society
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    • v.10 no.4
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    • pp.633-637
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    • 2009
  • In this paper, we present the reuse module library generating algorithm and register-transfer (RT) library generating algorithm considering the power consumption of reuse module for field-programmable gate array (FPGA) technology mapping in order to implement into the circuit for calculating power consumption. To realize the circuit of calculation of power consumption, the FPGA is selected. Considering lookup table (LUT) conditions of selected FPGA, technology mapping process is conducted to minimize the total power consumption. With these information, the circuit is realized using suitable given power consumption among allocated results of modules.

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A Computational Complexity Reduction Scheme for SLM Based OFDM Communication Systems (SLM 기반의 OFDM 통신 시스템을 위한 계산 복잡도 저감 기법)

  • Cho, Soo-Bum;Hyun, Kwang-Min;Park, Sang-Kyu
    • Journal of Internet Computing and Services
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    • v.13 no.2
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    • pp.13-20
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    • 2012
  • SLM (Selected Mapping) is an efficient PAPR (Peak-to-Average Power Ratio) reduction scheme without transmitted signal distortion in OFDM (Orthogonal Frequency Division Multiplexing) systems. However, enormous IFFTs (Inverse Fast Fourier Transforms) are needed to generate sufficient candidate OFDM signals, which cause the SLM to become quite complex. In this paper, we propose a new SLM scheme that replaces the IFFT operations with a conversion of the first candidate OFDM signal. The proposed scheme significantly reduces computational complexity, while it shows almost the same PAPR performance as the conventional SLM scheme.

Performance Analysis of SLM Method for PAR Reduction Based on OFDM System (OFDM 시스템에서 PAR 감소를 위한 SLM 기법의 성능 분석)

  • Lee, Sang-Geun;Lee, Yoon-Hyun;Jin, Seong-Woo
    • Journal of Advanced Navigation Technology
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    • v.10 no.1
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    • pp.20-25
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    • 2006
  • In these days, OFDM(Orthogonal Frequency Division Multiplexing) is adopted to support high-speed data communication based on multi-path RF channel, but it has some weak point. One of those is that it has a higher PAR(peak-to-average power ratio) compared with single-carrier method. If some PAR of the transmitted signal is high, nonlinear amplitude distortion has occurred when it pass through the HPA(high power amplifier). There is a solution to prevent nonlinear distortion using higher peak power HPA, but it makes inefficiency and a cost problem. In this paper, we choose the SLM(Selected Mapping) scheme, which transmit the lowest PAR signal after OFDM symbol mapping, in various schemes reducing PAR for OFDM system. And we derived the performances of SLM method in fading channel through computer simulations.

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