• Journal of Advanced Marine Engineering and Technology
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• v.37 no.2
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• pp.220-226
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• 2013

Recently, with the rapid development of factory automation and logistics system, a few workers were able to manage the broad workplace such as large vessels and warehouse. To estimate the exact location of these workers in the conventional wireless indoor localization systems, three or more fixed nodes are generally used to recognize the location of a mobile node consisting of a single node. However, these methods are inefficient in terms of node deployment because the broad workplace requires a lot of fixed nodes compared to workers(mobile nodes). Therefore, to efficiently deploy fixed nodes in these environments that need a few workers, this paper presents a novel estimation algorithm which can reduce the number of fixed nodes by efficiently recognizing the relative coordinates of two fixed nodes through a mobile node composed of three nodes. Also, to minimize the distance errors between mobile node and fixed node, rounding estimation(RE) technique is proposed. Experimental results show that the error rate of localization is improved, by using proposed RE technique, 90.9% compared to conventional trilateration in the free space. In addition, despite the number of fixed nodes can be reduced by up to 50% in the indoor free space, the proposed estimation algorithm recognizes precise location which has average error of 0.15m.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.711-714
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• 2005

We propose floating point arithmetic units for geometry operation of mobile 3D graphic processor. The proposed arithmetic units conform to the single precision format of IEEE standard 754-1985 that is a standard of floating point arithmetic. The rounding algorithm applies the nearest toward zero form. The proposed adder/subtraction unit and multiplier have one clock cycle latency, and the inversion unit has three clock cycle latency. We estimate the required numbers of arithmetic operation for Viewing transformation. The first stage of geometry operation is composed with translation, rotation and scaling operation. The translation operation requires three addition and the rotation operation needs three addition and six multiplication. The scaling operation requires three multiplication. The viewing transformation is performed in 15 clock cycles. If the adder and the multiplier have their own in/out ports, the viewing transformation can be done in 9 clock cycles. The error margin of proposed arithmetic units is smaller than $10^{-5}$ that is the request in the OpenGL standard. The proposed arithmetic units carry out operations in 100MHz clock frequency.

• The Journal of Information Technology
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• v.10 no.3
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• pp.15-31
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• 2007

Region-of-Interest is the region within the image selected for the users needs. The development of multimedia has made the expectation of image telecommunication higher, but the usage of the image, image transmission time, and image storage create problems. When transmitter or the receiver stops transmission at some point, we can still see the general image and the ROI maintains better image quality if the ROI is specified beforehand. In this paper, three methods are proposed and constructed for the transmission of ROI. In the first method, the ROI and the background are separated and then encoded as described above. The second method is to encode without separating the ROI and the background. The masked region is scaled and the coefficients are increased, then the region is transmitted first. The third method is the loseless coding of the ROI. For loseless coding, real number tap cannot be restored perfectly due to the rounding error, so the method of using integers is used. The proposed method shows a better performance than EZW even in case of ROI's PSNR at quality of 40 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11C
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• pp.932-939
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• 2008

Recently lattice-reduction (LR) has been used in signal detection for multiple-input multiple-output (MIMO) systems. The conventional LR aided detection schemes are combinations of LR and signal detection methods such as zero-forcing (ZF) and minimum mean square error (MMSE) detection. In this paper, we propose the Lattice-Reduction-aided scheme based on extended noise variance matrix to search good candidate symbol set in quantization step. Then this scheme estimates transmitted symbol with Semidefinite Relaxation by candidate symbol set. Simulation results in a random MIMO system show that the proposed scheme exhibits improved performance and a slight increase in complexity.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1447-1453
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• 2014

This paper proposes the new method based on the availability of three points measurement and convexity of photovoltaic (PV) curve characteristic at the maximum power point (MPP). In general, the MPP tracking (MPPT) function is the important part of all PV systems due to their power-voltage (P-V) characteristics related with weather conditions. Then, the analog-to-digital converter (ADC) and low pass filter (LPF) are required to measure the voltage and current for MPPT by the digital controller, which is used to implement the PV power conditioning system (PCS). The measurement and quantization error due to rounding or truncation in ADC and the delay of LPF might degrade the reliability of MPPT. To overcome this limitation, the proposed method is proposed while improving the performances in both steady-state and dynamic responses based on the detailed investigation of its properties for availability and convexity. The performances of proposed method are evaluated with the several case studies by the PSCAD/EMTDC$^{(R)}$ simulation. Then, the experimental results are given to verify its feasibility in real-time.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.1 no.1
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• pp.75-79
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• 1983

現代 컴퓨터의 연산장치(Arithmetic unit)의 design을 하는데 있어서 가장 중요하게 요구점점되는 點은 계산의 속도(Computational speed)와 計算의 정확성 (Computational accuracy)이라고 보겠다. 여기서는 정보처리기(Information processor)로서 또는 非數理的인 연산(Non-numeric operation)을 위한 도구로서 보다는 數理的 연산(Arithmetic)을 수행하는 도구로서의 컴퓨터 연산에 限해서만 論하고자 한다. 대개의 경우 기계를 고안하는 사람들은 계사의 속도에 對해서는 특별한 관심을 갖고 그러한 목적에 맞는 기계를 만들어 낼려고 하지만 數値의 정 확성(Numerical accuracy)에 對해서ㅡ 등한시했던 경우가 많았다고 보겠다. 그러 나 이 두 條件 즉 빠른 속도 틀림없는 정확성을 同時에 충족 시키고자 하는 것이 기계 고안자들의 理想 목포가 되는 것은 사시링다. 여기에 수반도는 문제는 제작 비를 고려하지 않을 수 없다는 것이다. 정화하고 빠른 operation을 할 수 있는 기 계는 너무 비싼 제작비가 들기 때문에 사용목적에 적절하게 두 문제를 절충하여 고려하는 것이 일반적이라 하겠다. 初期의 컴퓨터는 한 Word(Computer Word)로 서 36개의 bit를 사용한 것이 많았다고 본다. 그러나 1961년 4月 Tennessee에서 Oak Riage National Laboratory와 The Society for Industril and Applied Mathematics 후원하에 일주일에 걸친 국제회의가 열렸었는데 거기 모인 거의 모 든 學者들이 앞으로의 과학 연구용 컴퓨터(Scientific Computer)의 한 Word의 길 이는 적어도 48bit 이상으로 증가시켜야 된다는데 의견을 모았었다고 한다. 이제 rounding error의 성향(begavior)을 알아보기 위한 간단한 例를 들어 봄으로써 이 글을 쓰는 동기으 일면을 대신하고자 한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.66-73
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• 2002

As floating-point operations become widely used in various applications such as computer graphics and high-definition DSP, the needs for fast division become increased. However, conventional floating-point dividers occupy a large hardware area, and bring bottle-becks to the entire floating-point operations. In this paper, a high-performance and small-area floating-point divider, which is suitable for embedded processors, is designed using he series expansion algorithm. The algorithm is selected to utilize two MAC(Multiply-ACcumulate) units for quadratic convergence to the correct quotient. The two MAC units for SIMD-DSP features are shared and the additional area for the division only is very small. The proposed divider supports all rounding modes defined by IEEE 754 standard, and error estimations are performed for appropriate precision.

• The Mathematical Education
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• v.29 no.1
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• pp.21-34
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• 1990

This is a study on an instruction of estimation for error correction in the calculation with a computer or a calculator. The aim of this study is to survey a new aspect of calaulation teaching and the teaching strategy of estimation and finally to frame a new curriculum model of estimation instruction. This research required a year and the outcomes of the research can be listed as follows: 1. Social utilities of estimation were made clear, and a new trend of calculation teaching related to estimation instruction was shown. 2. The definition of estimation was given and actual examples of conducting an estimation among pupils in lower grades were given for them to have abundant experiences. 3. The ways of finding estimating values in fraction and decimal fraction were presented for the pupils to be able to conduct an estimation. 4. The following contents were given as a basic strategy for estimation. 1) Front-end strategy 2) Clustering strategy 3) Rounding strategy 4) Compatible numbers strategy 5) Special numbers strategy 5. In an instuction of estimation the meaning, method. and process of calculation and calculating algorithm were reviewed for the cultivation of children's creativity through promoting their basic skill, mathematical thinking and problem-solving ability. 6. The following contents were also covered as an estimation strategy for measurement 1) Calculating the sense of quantity on the size of unit. 2) Estimating the total quantity by frequent repetition of unit quantity. 3) Estimating the length and the volume by weighing. 4) Estimating unknown quantity based on the quatity already known. 5) Estimating the area by means of equivalent area transformation. 7. The ways of instructing mental computation were presented. 8. Reviews were made on the curricular and the textbook contents concerning estimation instructions both in Korea and Japan. and a new model of curriculum was devised with reference to estimation instruction data of the United States.