• Korean Journal of Metals and Materials
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• v.49 no.5
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• pp.388-394
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• 2011

High speed copper filling into TSV (through-silicon-via) for three dimensional stacking of Si chips was investigated. For this study, a tapered via was prepared on a Si wafer by the DRIE (deep reactive ion etching) process. The via had a diameter of 37${\mu}m$ at the via opening, and 32${\mu}m$ at the via bottom, respectively and a depth of 70${\mu}m$. $SiO_2$, Ti, and Au layers were coated as functional layers on the via wall. In order to increase the filling ratio of Cu into the via, a PPR (periodic pulse reverse) wave current was applied to the Si chip during electroplating, and a PR (pulse reverse) wave current was applied for comparison. After Cu filling, the cross sections of the vias was observed by FE-SEM (field emission scanning electron microscopy). The experimental results show that the tapered via was filled to 100% at -5.85 mA/$cm^2$ for 60 min of plating by PPR wave current. The filling ratio into the tapered via by the PPR current was 2.5 times higher than that of a straight via by PR current. The tapered via by the PPR electroplating process was confirmed to be effective to fill the TSV in a short time.

• Journal of Electrical Engineering and Technology
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• v.10 no.6
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• pp.2307-2314
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• 2015

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.285-289
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• 2015

We prepared silver Schottky contacts to O-polar and nonpolar m-plane bulk ZnO wafers. Then, by considering various transport models, we performed a comparative analysis of the current transport properties of Ag/bulk ZnO Schottky diodes, which were measured at 300, 200, and 100 K. The fitting of the forward bias current-voltage (I-V) characteristics revealed that the tunneling current is dominant as the transport component in both the samples. Compared to thermionic emission (TE), a stronger contribution of tunneling current was observed at low temperature. The reverse bias I-V characteristics were well fitted with the thermionic field emission (TFE) in both the samples. The presence of acceptor-like adsorbates, such as O₂ and H₂O, modulated the surface conductive state of ZnO, thereby affecting the tunneling effect. The degree of activation/passivation of acceptor-like adsorbates might be different in both the samples owing to their different surface morphologies and surface defects (e.g., oxygen vacancies).

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.12B no.1
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• pp.37-43
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• 2002

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5㎾ prototype boost converter operating at 40KHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.344-345
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• 2012

The Gate-Induced-Drain-Leakage (GIDL) current with channel doping and width dependence are characterized. The GIDL currents are found to increase in MOSFETs with higher channel doping levels and the observed GIDL current is generated by the band-to-band-tunneling (BTBT) of electron through the reverse-biased channel-to-drain p-n junction. A BTBT model is used to fit the measured GIDL currents under different channel-doping levels. Good agreement is obtained between the modeled results and experimental data. The increase of the GIDL current at narrower widths in mainly caused by the stronger gate field at the edge of the shallow trench isolation (STI). As channel width decreases, a larger portion of the GIDL current is generated at the channel-isolation edge. Therefore, the stronger gate field at the channel-isolation edge causes the total unit-width GIDL current to increases for narrow-width devices.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1996.10a
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• pp.113-116
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• 1996

Firms spend enormous efforts identifying current processes and understanding the related details before establishing new business processes in their business process redesign (BPR) projects. Considering excessive efforts required during the analysis phase and limited support to BPR projects, need for a better method is evident This article describes a method of modeling enterprise business processes bayed on common business forms. By identifying form operations and form field types, the proposed method provides redesign view on the information handling as well as the current process flows in the form of an Event-Process Chain (EPC) diagram.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.208-211
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• 1999

Abstract - Electrical characteristics or asymmetric n-MOSFET's with different source and drain geometry are experimently investigated using test structures having various gate width. Saturation drain current and resistance in linear region are estimated by a simple schematic model, which consists of conventional device having parasitic resistor. A comparison of experimental results of symmetric and asymmetric devices gives the parasitic resistance caused by abnormal device structure. The suggested model shows good agreement with the measured drain current for both forward- and reverse-modes.

• International Journal of Automotive Technology
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• v.3 no.1
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• pp.27-32
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• 2002

Semi-active suspension systems are greatly expected to be in the mainstream of future controlled suspensions fur passenger cars. In this study, a continuous variable damper for a passenger car suspension is developed. It is controlled actively and exhibits high performance with light weight, low cost, and low energy consumption. To get fast response of the damper, reverse damping mechanism is adapted, and to get small pressure change rate after blow-off, a pilot controlled proportional valve is designed and analyzed. The reverse continuous variable damper is designed as a HS-SH damper which offers good body control with reduced transferred input force from tire, compared with any other type of suspension system. The damper structure is designed, so that rebound and compression damping force can be tuned independently, of which variable valve is placed externally. The rate of pressure change with respect to the flow rate after blow-offbecomes smooth when the fixed orifice size increases. Damping forces are measured with the change of the solenoid current at the different piston velocities to confirm the maximum hysteresis of 20N, linearity, and variance of damping farce. The damping farce variance is wide and continuous, and is controlled by the spoof opening, of which scheme is usually adapted in proportional valves. The reverse continuous variable damper developed in this study is expected to be utilized in the semi-active suspension systems in passenger cars after its performance and simplicity of the design is confirmed through real car test.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.211-212
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• 2010

GaN 기반의 상부발광형 LED는 동작되는 동안 생기는 전기적 단락, 그리고 칩 위의 p-형 전극과 n-형 전극 사이에 생기는 누설전류 및 신뢰성 확보를 위하여 칩 표면에 passivation 층을 형성하게 된다. SiO2, Si3N4와 같은 passivation layers는 일반적으로 PECVD (Plasma Enhanced Chemical Vapor Deposition)공정을 이용한다, 하지만 이는 공정 특성상 plasma로 인한 damage가 유발되기 때문에 표면 누설 전류가 증가 한다. 이로 인해 forward voltage와 reverse leakage current의 특성이 저하된다. 본 실험에서는 원자층 단위의 박막 증착으로 인해 PECVD보다 단차 피복성이 매우 우수한 PEALD(Plasma Enhanced Atomic Layer Deposition)공정을 이용하여 Al2O3 passivation layer를 증착한 후, 표면 누설전류와 빛의 출력 특성에 대해서 조사해 보았다. PSS (patterned sapphire substrate) 위에 성장된 LED 에피구조를 사용하였고, TCP(Trancformer Copled Plasma)장비를 사용하여 에칭 공정을 진행하였다. 이때 투명전극을 증착하기 위해 e-beam evaporator를 사용하여 Ni/Au를 각각 $50\;{\AA}$씩 증착한 후 오믹 특성을 향상시키기 위하여 $500^{\circ}C$에서 열처리를 해주었다. 그리고 Ti/Au($300/4000{\AA}$) 메탈을 사용하여 p-전극과 n-전극을 형성하였다. Passivation을 하지 않은 경우에는 reverse leakage current가 -5V 에서 $-1.9{\times}10-8$ A 로 측정되었고, SiO2와 Si3N4을 passivation으로 이용한 경우에는 각각 $8.7{\times}10-9$과 $-2.2{\times}10-9$로 측정되었다. Fig. 1 에서 보면 알 수 있듯이 5 nm의 Al2O3 film을 passivation layer로 이용할 경우 passivation을 하지 않은 경우를 제외한 다른 passivation 경우보다 reverse leakage current가 약 2 order ($-3.46{\times}10-11$ A) 정도 낮게 측정되었다. 그 이유는 CVD 공정보다 짧은 ALD의 공정시간과 더 낮은 RF Power로 인해 plasma damage를 덜 입게 되어 나타난 것으로 생각된다. Fig. 2 에서는 Al2O3로 passivation을 한 소자의 forward voltage가 SiO2와 Si3N4로 passivation을 한 소자보다 각각 0.07 V와 0.25 V씩 낮아지는 것을 확인할 수 있었다. 또한 Fig. 3 에서는 Al2O3로 passivation을 한 소자의 output power가 SiO2와 Si3N4로 passivation을 한 소자보다 각각 2.7%와 24.6%씩 증가한 것을 볼 수 있다. Output power가 증가된 원인으로는 향상된 forward voltage 및 reverse에서의 leakage 특성과 공기보다 높은 Al2O3의 굴절률이 광출력 효율을 증가시켰기 때문인 것으로 판단된다.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2310-2318
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• 2018

Critical conduction mode (CRM) operation is more efficient than continuous conduction mode (CCM) operation at low power levels because of the valley switching of switches and elimination of the reverse recovery losses of boost diodes. When using a sensorless digital control method, an error occurs between the actual and the estimated current. Because of the error, it operates as CCM or discontinuous conduction mode (DCM) during CRM operation and also has an adverse effect on THD of input current. In this paper, a current sensorless technique is presented in an inverter system using a bridgeless boosted power factor correction converter, and a compensation method is proposed to reduce CRM calculation error. The validity of the proposed method is verified by simulation and experiment.