• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.759-762
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• 2002

A ZCT(Zero Current Transition) PWM(Pulse-Width-Modulation) boost converter using parallel MOSFET switch is proposed in this paper. The IGBT(main switch) of the proposed converter is always turned on with zero current switching and turned off with zero current/zero voltage switching. The MOSFET(auxiliary switch) is also operates with soft switching condition. In addtion to, the proposed converter eliminates the reverse recovery current of the freewheeling diode by adding the resonant inductor, Lr, in series with the main switch. Therefore, the turn on/turn off switching losses of switches are minimized and the conduction losses by using IGBT switch are reduced. In addition to, using parallel MOSFET switch overcomes the switching frequency limitation occurred by current tail. As mentioned above, the characteristics are verified through experimental results.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2014.11a
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• pp.108-109
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• 2014

본 논문에서는 gate와 drain bias stress하에서의 a-IGZO thin-film transistors (TFTs)의 비대칭 열화 메커니즘 분석을 진행하였다. Gate와 drain bias stress하에서의 a-IGZO TFT의 열화 현상은 conduction band edge 근처에 존재하는 oxygen vacancy-related donor-like trap의 발생으로 예상되며, TFT의 channel layer 내에서의 비대칭 열화현상은 source의 metal과 a-IGZO layer간의 contact에 전압이 인가되었을 경우, reverse-biased Schottky diode에 의한 source 쪽에서의 높은 electric field가 trap generation을 가속화시킴으로써 일어나는 것임을 확인할 수 있었다.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.3
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• pp.220-226
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• 2014

Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

• Journal of Power Electronics
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• v.14 no.4
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• pp.649-660
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• 2014

A novel non-isolated bidirectional soft-switching SEPIC/ZETA converter with reduced ripple currents is proposed and characterized in this study. Two auxiliary switches and an inductor are added to the original bidirectional SEPIC/ZETA components to form a new direct power delivery path between input and output. The proposed converter can be operated in the forward SEPIC and reverse ZETA modes with reduced ripple currents and increased voltage gains attributed to the optimized selection of duty ratios. All switches in the proposed converter can be operated at zero-current-switching turn-on and/or turn-off through soft current commutation. Therefore, the switching and conduction losses of the proposed converter are considerably reduced compared with those of conventional bidirectional SEPIC/ZETA converters. The operation principles and characteristics of the proposed converter are analyzed in detail and verified by the simulation and experimental results.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1159-1161
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• 1993

This paper may be presented the carrier oscillation properties for the varistor fabricated by a new method of three-composition seed grain, in order to analyze the behavior of carriers at the its equivalent circuit model. The oscillation phenomena of carriers appeared from current-voltage characteristics under knee voltage is shown by the transient flow of non trapped carriers group in the trap level of intergranular layer, surface state and/or depletion layer. However, Current oscillation phenomena is hardly shown in the high electric field. The injected carriers from both electrodes are directly flowed from the conduction band of forward biased grain through the intergranular layer into the reverse biased grain, because the trap level in the electric field above the knee voltage is mostly filled.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1448-1452
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• 2004

In this paper, a photodiode capable of obtaining a sufficient photo/ dark current ratio at both a forward bias state and a reverse bias state is proposed. The photodiode includes a glass substrate, an Cr thin film formed as a lower electrode over the glass substrate, Cr silicide thin film(∼l00$\AA$) ) formed as a schottky barrier over the Cr thin film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the Cr silicide thin film. Transparent conduction film ITO (thickness 100nm) formed as an upper electrode over the hydro-generated amorphous silicon film is then deposited in pure argon at room temperature for the Schottky contact and light window. The high quality Cr silicide thin film using annealing of Cr and a-Si:H is formed and analyzed by experiment. We have obtained the film with a superior characteristics. The dark current of the ITO/a-Si:H Schottky at a reverse bias of -5V is ∼3$\times$IO-12 A/un2, and one of the lowest reported, hitherto. AES(Auger Electron Spectroscophy) measurements indicate that this notable improvement in device characteristics stems from reduced diffusion of oxygen, rather than indium, from the ITO into the a-Si:H layer, thus, preserving the integrity of the Schottky interface. The spectral response of the photodiode for wavelengths in the range from 400nm to 800nm shows the expected behavior whereby the photocurrent is governed by the absorption characteristics of a-Si:H.

• Journal of the Korean Vacuum Society
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• v.17 no.4
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• pp.302-310
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• 2008

Heat transfer between substrate and substrate-heater in low vacuum was investigated. The convection related with gas flow and pressure, the heat conduction considering surface roughness and contact pressure, and the heat loss by radiation depending on the surface emissivity were considered. The coefficient of heat conduction $h_c$ in the Fourier's law were determined experimentally from the temperature difference between the substrate and the substrate-heater in the range of substrate-heater temperature $100\;-\;500^{\circ}C$, in the pressures of 300 mTorr - 1 Torr. The temperature difference was then calculated in the reverse way for the purpose of verification, using the heat flow and the experimentally determined coefficients. The verified temperature differences were thus obtained within 0.33 % error.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1226-1235
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• 2016

For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm², while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.28 no.1
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• pp.9-18
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• 2015

In this paper, we verify the optimal topology design for heat conduction problems in steady stated which is obtained numerically using the adjoint design sensitivity analysis(DSA) method. In adjoint variable method(AVM), the already factorized system matrix is utilized to obtain the adjoint solution so that its computation cost is trivial for the sensitivity. For the topology optimization, the design variables are parameterized into normalized bulk material densities. The objective function and constraint are the thermal compliance of the structure and the allowable volume, respectively. For the experimental validation of the optimal topology design, we compare the results with those that have identical volume but designed intuitively using a thermal imaging camera. To manufacture the optimal design, we apply a simple numerical method to convert it into point cloud data and perform CAD modeling using commercial reverse engineering software. Based on the CAD model, we manufacture the optimal topology design by CNC.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.2
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• pp.89-96
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• 2015

This paper presents a high efficiency, PSM/DCM/CCM triple mode boost DC-DC converter for mobile application. This device operates at Pulse-Skipping Mode(PSM) when it enters light load, and otherwise operate the operating frequency of 1.4MHz with Pulse-Width Modulation(PWM) mode. Especially in order to improve the efficiency during the Discontinuous-Conduction Mode(DCM) operation period, the reverse current prevention circuit and oscillations caused by the inductor and the parasitic capacitor to prevent the Ringing killer circuit is added. The input voltage of the boost converter ranges from 2.5V ~ 4.2V and it generates the output of 4.8V. The measurement results show that the boost converter provides a peak efficiency of 92% on CCM and 87% on DCM. And an efficiency-improving PWM operation raises the efficiency drop because of transition from PWM to PFM. The converter has been fabricated with a 0.18um Dongbu BCDMOS technology.