• Korean Journal of Optics and Photonics
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• v.8 no.3
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• pp.218-222
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• 1997

We fabricated a bistable TN LCD with 180$^{\circ}$ twist angle and confirmed that it has a fast switching response time and a high contrast ratio. We also investigated the effects of the amplitude and width of the reset and selection pulses on a bistable TN LC cell and the conditions of the bistability and the memory time. The range of d/p values showing the bistability is determinded for the pretilt angle according to the rubbing depth.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.11
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• pp.12-19
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• 2015

In network-centric warfare, the communication network has played a significant role in defeating an enemy. Especially, the urgent and important data should be preferentially delivered in time. Thus, we proposed a priority MAC protocol based on CSMA/CA with Binary Exponential Back-off for tactical wireless networks. This MAC protocol suggested a PCW(Prioritized Contention Window) with differentiated back-off time by priority and a RBR(Repetitive Back-off Reset) to reset the remaining back-off time. The results showed that this proposed MAC has higher performance than those of DCF(Distributed Coordination Function) in the transmission success rate and the number of control packet transmission by reducing the packet collision. Thus, it produced more effective power consumption. In comparison with DCF, this proposed protocol is more suitable in high-traffic network.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.2
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• pp.17-22
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• 2003

The priming discharge characteristic at the reset period in the ADS drive method of PDP was experimentally analyzed in this research. The amount of wall charge accumulated by the discharge and the accumulated time are unrelated to the priming pulse width. The self-erase discharge by excessive wall charge is related to the amount of wall charge by the priming discharge and this is related to space charge generated by the priming discharge. From the experimental result, in the optimized priming condition the plus width is 8$mutextrm{s}$ and the voltage is about 163V. The space charge which helps the self-erase discharge exists during about 16$mutextrm{s}$ immediately after generating the priming discharge. Therefore, it is suitable within 16$mutextrm{s}$ of the priming pluse width for the effective reset process.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.39-46
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• 2003

In this papers, We studied system requirement specification, hardware design and implementation, protective algorithm and software design method to implement digital protective relay which has high trust and high function of protection as well as control and metering for power transformers. Protective relay for transformer is implemented on real time using DSP, which is the specific processor for digital signal processing, as a result, it is completed by the wide improvement of arithmetic capability of protective relay. Reliability is proved testing operating value and operating time, reset value and reset time of an relaying element using protective relay tester made in NF Corporation of Japan.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.647-649
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• 2013

This paper is the study of effective recovery system in the android set-top box, using NTP (Network Time Protocol). Because of Response to the user react quickly in case of a set-top box, needs compared to other electronic products, set-top box is one of always powered features to work at home. But general-purpose OS such as Android-based set-top box have to reset for cache & main memory initialization. In this paper, we introduce system reset & recovery by NTP client utilizing.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.12
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• pp.2289-2296
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• 2016

The password rules to be applied for the user account creation are often different by websites. Thus we often forget the password to sign in website and it creates waste of time for frequent password reset. In order to solve this problem we propose a new authentication method in this paper. When user forget the password to sign in, the existing methods require a password reset step but our proposed method provides new sign in scheme through the additional authentication step with base password and personal information registered at the member sign up stage. From the result of performance comparison the proposed method is considered to be more efficient than others because it provides not only an equivalent level of security with others but also requires only a half of the number of transactions and the time required for password reset step.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1271-1274
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• 2006

Integrated a-Si:H gate driver with high reliability has been designed and simulated. The proposed a-S:H gate driver has only one reset transistor under AC driving for P and output node. These reset transistors show much less degradation than those under DC driving. The simulation results show that the lifetime and response time are improved significantly compared with those of the prior circuit.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.539-545
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• 2013

In this paper, a behavioral current-voltage model with intermediate states is proposed for analog applications of unipolar resistive memories, where intermediate resistance values between SET and RESET state are used to store analog data. In this model, SET and RESET behaviors are unified into one equation by the blending function and the percentage volume fraction of each region is modeled by the Johnson-Mehl-Avrami (JMA) equation that can describe the time-dependent phase transformation of unipolar memory. The proposed model is verified by the measured results of $TiO_2$ unipolar memory and tested by the SPECTRE circuit simulation with CMOS read and write circuits for unipolar resistive memories. With the proposed model, we also show that the behavioral model that combines the blending equation and JMA kinetics can universally describe not only unipolar memories but also bipolar ones. This universal behavioral model can be useful in practical applications, where various kinds of both unipolar and bipolar memories are being intensively studied, regardless of polarity of resistive memories.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.94-97
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• 2007

The desin and implementation of a CMOS analog integrated circuit that provides dual-mode modulations, PWM for active clamp reset converter and PFM for LLC resonant converter, is described. The proposed controller is capable of implementing programmable soft start and current-mode control with compensating ramp for PWM and frequency shifting soft start for PFM. Also it provides delay time for both modes. PWM mode is implemented by active clamp reset converter and PFM mode is implemented by LLC resonant convereter, respectively. The chip is fabricated using the 0.6um high voltage CMOS process.

• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.109-112
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• 2005

본 논문에서는 초기화 구간에서의 시간단축과 높은 암실 명암비를 얻을 수 있는 새로운 초기화 파형을 제시한다. 새로운 초기화 파형에서 첫 번째 subfield는 기존의 conventional 구동파형과 마찬가지로 초기화 구간에서 ramp-up구간과 ramp-down구간이 필요하지만, 두 번째 subfield부터는 단지 ramp-up구간만이 적용된다. 한 frame에 8개의 subfield를 적용할 경우, 기존의 구동파형의 배경광이 $0.40cd/m^2$로 측정되는 반면, 새로운 초기화파형을 패널에 적용할 경우 배경광이 측정되지 않는다. 이러하여 우리는 새로운 초기화파형에서 무한대의 암실 명암비를 얻을 수 있다. 또한 새로운 초기화파형에서는 ramp-down구간을 없앰으로써 첫 번째 subfield를 제외하고는 초기화 시간을 165us로 시간을 줄일 수 있다.