• BMB Reports
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• 제56권6호
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• pp.335-340
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• 2023

During normal physiological and abnormal pathophysiological conditions, all cells release membrane vesicles, termed extracellular vesicles (EVs). Growing evidence has revealed that EVs act as important messengers in intercellular communication. EVs play emerging roles in cellular responses and the modulation of immune responses during virus infection. EVs contribute to triggering antiviral responses to restrict virus infection and replication. Conversely, the role of EVs in the facilitation of virus spread and pathogenesis has been widely documented. Depending on the cell of origin, EVs carry effector functions from one cell to the other by horizontal transfer of their bioactive cargoes, including DNA, RNA, proteins, lipids, and metabolites. The diverse constituents of EVs can reflect the altered states of cells or tissues during virus infection, thereby offering a diagnostic readout. The exchanges of cellular and/or viral components by EVs can inform the therapeutic potential of EVs for infectious diseases. This review discusses recent advances of EVs to explore the complex roles of EVs during virus infection and their therapeutic potential, focusing on HIV-1.

• 천문학논총
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• 제21권2호
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• pp.67-74
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• 2006

We have developed a control electronics system for an infrared detector array of KASINICS (KASI Near Infrared Camera System), which is a new ground-based instrument of the Korea Astronomy and Space science Institute (KASI). Equipped with a $512{\times}512$ InSb array (ALADDIN III Quadrant, manufactured by Raytheon) sensitive from 1 to $5{\mu}m$, KASINICS will be used at J, H, Ks, and L-bands. The controller consists of DSP(Digital Signal Processor), Bias, Clock, and Video boards which are installed on a single VME-bus backplane. TMS320C6713DSP, FPGA(Field Programmable Gate Array), and 384-MB SDRAM(Synchronous Dynamic Random Access Memory) are included in the DSP board. DSP board manages entire electronics system, generates digital clock patterns and communicates with a PC using USB 2.0 interface. The clock patterns are downloaded from a PC and stored on the FPGA. UART is used for the communication with peripherals. Video board has 4 channel ADC which converts video signal into 16-bit digital numbers. Two video boards are installed on the controller for ALADDIN array. The Bias board provides 16 dc bias voltages and the Clock board has 15 clock channels. We have also coded a DSP firmware and a test version of control software in C-language. The controller is flexible enough to operate a wide range of IR array and CCD. Operational tests of the controller have been successfully finished using a test ROIC (Read-Out Integrated Circuit).

• 방사선산업학회지
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• 제6권1호
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• pp.31-40
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• 2012

There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

• 한국지반공학회논문집
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• 제22권4호
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• pp.41-49
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• 2006

이 논문에서는 S파 탄성파 반사법의 토목공학용 지반조사에의 적합성을 검토하기 위한 연구를 다룬다. 높이 약 20m 미만의 암반사면에 대한 S파 탄성파 반사법 탐사를 시행하였다. 탄성파 자료취득에는 표준적인 공심점 기법이 사용되었으며 24채널의 탄성파탐사기와 SH파의 진원으로 해머가 사용되었다. 수진기 전개는 양측전개가 채택되었고 진원점 및 수진점 간격은 각각 2m 이었다. 취득된 자료는 전산처리 과정을 거친 결과 신호대 잡음비가 향상되고 단면의 해상도가 향상되었으며 기반암의 속도정보가 얻어졌다. 최종 S파 반사단면은 1m 미만의 얕은 심도까지 반사파를 보여 주며 해상도는 1m 미만의 초고해상도를 보인다. 구조보정된 단면에서는 야외의 사면노두에서 확인된 층리면 및 단층에 잘 대비되는 뚜렷한 반사파 신호를 보여준다. 이와 같이 S파 탄성파 반사법을 이용하여 천부 지반 지질구조의 정밀한 반사 단면의 작성이 가능하므로 토목공학용 최적 시추공 위치의 결정에 이 방법이 유용하게 쓰일 수 있을 것이다.

• 전기학회논문지
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• 제60권12호
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• pp.2311-2317
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• 2011

In this paper, we study the temperature change of a ${\mu}$-bolometer focal plane array with a capacitive transimpedance amplifier bias cancellation circuit. Thermal analysis is essential to understand the performance of a ${\mu}$-bolometer focal plane array, and to improve the temperature stability of a focal plane array characteristics. In this study, the thermal analyses of a ${\mu}$-bolometer and its two reference detectors are carried out as a function of time. The analyses are done with the $30{\mu}m$ pitch $320{\times}240$ focal plane array operating of 60 Hz frame rate and having a columnwise readout. From the results, the temperature increase of a ${\mu}$-bolometer in FPA by an incident IR is estimated as $0.689^{\circ}C$, while the temperature increase by a pulsed bias as $7.1^{\circ}C$, which is about 10 times larger than by IR. The temperature increase of a reference detector by a train of bias pulses may be increased much higher than that of an active ${\mu}$-bolometer. The suppression of temperature increase in a reference bolometer can be done by increasing the thermal conductivity of the reference bolometer, in which the selection of thermal conductivity also determines the range of CTIA output voltage.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 학술대회지
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• pp.482-485
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• 2004

We fabricated a hybrid bulk/fully depleted silicon on insulator (FDSOI) complementary metal oxide semiconductor (CMOS) active pixel image sensor. The active pixel is comprised of reset and source follower transistors on the SOI seed wafer, while the pinned photodiode and readout gate and floating diffusion are fabricated on the SOI handle wafer after the removal of the buried oxide. The source of dark current is eliminated by hybrid bulk/FDSOI pixel structure between localized oxidation of silicon (LOCOS) and photodiode(PD). By using the low noise hybrid pixel structure, dark currents qm be suppressed significantly. The pinned photodiode can also be optimized for quantum efficiency and reduce the noise of dark current. The spectral response of the pinned photodiode on the SOI handle wafer is very flat between 400 nm and 700 nm and the dark current that is higher than desired is about 10 nA/cm2 at a $V_{DD}$ of 2 V.

• ETRI Journal
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• 제30권5호
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• pp.644-652
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• 2008

In this paper, a low-power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35-${\mu}m$ CMOS logic technology. To achieve low-power performance, the low-voltage capacitance-to-pulse-width converter based on a self-reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self-reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra-low power dissipation of 157 ${\mu}W$ of the interface-circuit core. These results demonstrate that the new interface circuit with self-reset operation successfully reduces power consumption. In addition, a prototype wireless sensor-module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low-power performance is essential.

• 한국전기전자재료학회논문지
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• 제24권5호
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• pp.387-391
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• 2011

A uncooled infrared ray sensor used in an infrared thermal imaging detector has many advantages. But because the uncooled infrared ray sensor is made by MEMS (micro-electro-mechanical system) process variation of offset is large. In this paper, to solve process variation of offset a ROIC for uncooled infrared ray sensor that has process variation of offset compensation technique using differential delta sampling and reference signal compensation circuit was proposed. As a result of simulation that uses the proposed ROIC, it was possible to acquire compensated output characteristics without process variation of offsets.

• Journal of Biosystems Engineering
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• 제43권1호
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• pp.30-36
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• 2018

Purpose: The objective of this study is to evaluate the effect of cultivation conditions on the growth and glucosinolate content of Chinese cabbage and kale. Methods: Chinese cabbage and kale were grown in three different cultivation conditions, including a plant factory, greenhouse, and open field. Samples were collected at two harvesting times (10 d and 20 d after transplanting the seedlings). Nine growth parameters (plant height, plant width, number of leaves, petiole diameter, SPAD readout, leaf length, leaf width, stem diameter, and plant weight) were measured immediately after harvesting, and the samples were freeze-dried and stored until the glucosinolate content was analyzed. Mean values of the growth parameters and glucosinolate contents were evaluated using Duncan's multiple range tests. Results: The results indicated that the plant parameters of the Chinese cabbage and kale were greater for plants grown in the plant factory and greenhouse. The plant height, width, and weight showed significant differences in the Duncan's multiple range tests at a 5% level. The plant factory also produced greater contents of most of the glucosinolates. Conclusions: Three different cultivation conditions significantly affected the growth and glucosinolate contents of Chinese cabbage and kale. Further study is necessary to investigate other functional components and different vegetable varieties.

• 한국산학기술학회논문지
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• 제13권6호
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• pp.2697-2701
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• 2012

안티퓨즈 MOS 커패시터를 기반으로 제작된 OTP 소자의 수율은 프로그램 과정에서 입력 저항(Rin)값과 통과 트랜지스터(Pass Tr)의 크기, 데이터 읽기 과정에서 읽기 트랜지스터(Read Tr)와 읽기 전압에 영향을 받는다. 따라서 수율에 영향을 주는 요소를 분석하기 위해 여러 가지 실험 조건을 달리하여 각각의 조건에 대해 블로잉 후 실효소자의 저항 특성에 대한 풀 맵(full map) 데이터를 얻어 OTP 소자가 어떻게 동작하는지를 분석하여 수율 개선에 필요한 최적 조건을 연구하였다. 최적 조건은 입력저항이 $50{\Omega}$, 통과 트랜지스터의 W값이 $10{\mu}m$, 읽기 전압이 2.8 V 일 때이다.