• Title/Summary/Keyword: pulse phase

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The Influence of Pulse Frequency and Duty Factor on Surface Characteristics during Low Temperature Plasma Nitrocarburizing Treatment of Duplex Stainless Steel (Duplex Stainless Steel의 저온 플라즈마 침질탄화시 Pulse Frequency 및 Duty Factor에 따른 표면 특성평가)

  • Cheon, Chang-Seok;Lee, Insup
    • Journal of the Korean institute of surface engineering
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    • v.47 no.5
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    • pp.221-226
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    • 2014
  • A low temperature plasma nitrocarburizng was implemented on the duplex stainless steel to achieve the enhancement of surface hardness without degradation of its corrosion resistance. Attempts were made to investigate the influence of Pulse frequency and Duty factor of pulsed power in a high Pulse frequency regime on the surface characteristics of the hardened layer. The hardened layer (S-phase) was formed on all of the treated surfaces. Surface hardness reached up to 1300 $HV_{0.1}$ which is about 4.6 times higher than that of the untreated material (280 $HV_{0.1}$). The thickness of the hardened layer tends to increase lightly with the higher Pulse frequency and the higher Duty factor. The corrosion resistance of nitrocarburized duplex stainless steel was almost similar to that of the untreated material. Both the Pulse frequency and the Duty factor do not have a significant influence on the corrosion property of plasma treated duplex stainless steel.

Adaptation of Space Vector Modulation to Single-Phase High Power PWM Converters (단상 PWM 컨버터에 적용한 공간 벡터 PWM)

  • Lee, Hee-Myun;Lee, Dong-Myung
    • Proceedings of the KIPE Conference
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    • 2011.07a
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    • pp.442-443
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    • 2011
  • In this paper, a voltage control method based on DQ transformation and Space Vector Pulse Width Modulation (SVPWM) for a single phase three-level converter is proposed. This control method is designed to use DC values instead of using instantaneous values of current which are usually used in single-phase application, so that it results in a fast and robust voltage control response. Simulation results demonstrate the validity of the control strategies.

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Design Optimization of High-Voltage Pulse Transformer for High-Power Pulsed Application (고출력 펄스응용을 위한 고전압 펄스변압기 최적설계)

  • Jang, S.D.;Kang, H.S.;Park, S.J.;Han, Y.J.;Cho, M.H.;NamKung, W.
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1297-1300
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    • 2008
  • A conventional linear accelerator system requires a flat-topped pulse with less than ${\pm}$ 0.5% ripple to meet the beam energy spread requirements and to improve pulse efficiency of RF systems. A pulse transformer is one of main determinants on the output pulse voltage shape. The pulse transformer was investigated and analyzed with the pulse response characteristics using a simplified equivalent circuit model. The damping factor ${\sigma}$ must be >0.86 to limit the overshoot to less than 0.5% during the flat-top phase. The low leakage inductance and distributed capacitance are often limiting factors to obtain a fast rise time. These parameters are largely controlled by the physical geometry and winding configuration of the transformer. A rise time can be improved by reducing the number of turns, but it produces larger pulse droop and requires a larger core size. By tradeoffs among these parameters, the high-voltage pulse transformer with a pulse width of 10 ${\mu}s$, a rise time of 0.84 ${\mu}s$, and a pulse droop of 2.9% has been designed and fabricated to drive a klystron which has an output voltage of 284 kV, 30-MW peak and 60-kW average RF output power. This paper describes design optimization of a high-voltage pulse transformer for high-power pulsed applications. The experimental results were analyzed and compared with the design. The design and optimal tuning parameter of the system was identified using the model simulation.

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Frequency Synchronization of Three-Phase Grid-Connected Inverters Controlled as Current Supplies

  • Fu, Zhenbin;Feng, Zhihua;Chen, Xi;Zheng, Xinxin;Yin, Jing
    • Journal of Power Electronics
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    • v.18 no.5
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    • pp.1347-1356
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    • 2018
  • In a three-phase system, three-phase AC signals can be translated into two-phase DC signals through a coordinate transformation. Thus, the PI regulator can realize a zero steady-state error for the DC signals. In the control of a three-phase grid-connected inverter, the phase angle of grid is normally detected by a phase-locked loop (PLL) and takes part in a coordinate transformation. A novel control strategy for a three-phase grid-connected inverter with a frequency-locked loop (FLL) based on coordinate transformation is proposed in this paper. The inverter is controlled as a current supply. The grid angle, which takes part in the coordinate transformation, is replaced by a periodic linear changing angle from $-{\pi}$ to ${\pi}$. The changing angle has the same frequency but a different phase than the grid angle. The frequency of the changing angle tracks the grid frequency by the negative feedback of the reactive power, which forms a FLL. The control strategy applies to non-ideal grids and it is a lot simpler than the control strategies with a PLL that are applied to non-ideal grids. The structure of the FLL is established. The principle and advantages of the proposed control strategy are discussed. The theoretical analysis is confirmed by experimental results.

Performance Analysis of Clock Recovery for OFDM/QPSK-DMR System Using Band Limited-Pulse Shaping Filter (대역 제한 필터를 이용하는 OFDM/QPSK-DMR 시스템을 위한 클럭 복조기의 성능 분석)

  • 안준배;양희진;강희곡;오창헌;조성준
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.2
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    • pp.245-249
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    • 2004
  • In this paper, we have proposed a clock recovery algorithm of Orthogonal Frequency Division Multiplexing/Quadrature Phase Shift Keying Modulation-Digital Microwave Radio(OFDM/QPSK-DMR) system using Band Limited-Pulse Shaping Filter(BL-PSF) and compared the clock phase error variance of OFDM/QPSK-DMR system with that of single carrier DMR system. The OFDM/QPSK-DMR system using windowing method requires training sequence or Cyclic Prefix (CP) to synchronize the clock phase of received signal. But transmit efficient is increased in our proposed DMR system because of no using redundant data such as training sequence or CP. The proposed clock recovery algorithm is simply realized in the OFDM/QPSK-DMR system using BL-PSF. The simulation results confirm that the proposed clock recovery algorithm has the same clock phase error variance performance in a single carrier DR system under Additive White Gaussian Noise(AWGN) environment.

Analysis of the Phase Current Measurement Boundary of Three Shunt Sensing PWM Inverters and an Expansion Method

  • Cho, Byung-Geuk;Ha, Jung-Ik;Sul, Seung-Ki
    • Journal of Power Electronics
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    • v.13 no.2
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    • pp.232-242
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    • 2013
  • To obtain phase currents information in AC drives, shunt sensing technology is known to show great performance in cost-effectiveness and therefore it is widely used in low cost applications. However, shunt sensing methods are unable to acquire phase currents in certain operation conditions. This paper deals with the derivation of the boundary conditions for phase current reconstruction in three-shunt sensing inverters and proposes a voltage injection method to expand the measurable areas. As the boundary conditions are deeply dependent on the switching patterns, they are typically analyzed on the voltage vector plane for space vector pulse width modulation (SVPWM) and discontinuous pulse width modulation (DPWM). In the proposed method, the voltage injection and its compensation are conducted within one sampling period. This guarantees fast current reconstruction and the injected voltage is decided so as to minimize the current ripple. In addition to the voltage injection method, a sampling point shifting method is also introduced to improve the boundary conditions. Simulation and experimental results are presented to verify the boundary condition derivation and the effectiveness of the proposed voltage injection method.

Manufacture and Estimation of Two phase driver for Linear Pulse Motor (리니어펄스모터의 2상 구동드라이버 제작 및 평가)

  • Kim, Dong-Hee;Kang, Geon-Il;Ahn, Jae-Young;Kim, Kwang-Heon;Lim, Young-Cheol;Park, Sung-Jun
    • Proceedings of the KIPE Conference
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    • 2007.11a
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    • pp.69-71
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    • 2007
  • Need correct analysis of thrust for control performance improvement of HB-LPM (Hybrid type Linear Pulse Motor). It is difficult to analyze HB-LPM's thrust. In this paper, HB-LPM's thrust is expressed to mathematical expression. And it is proved validity of this numerical formula by thrust measurement system. Two phase driver is composed. It is verified validity of numerical formula that measure waveform of electric current and voltage that is supplied in each phase. In this study, composed two phase drive driver, advantage of this IGBT element 6 by accumulated IPM module 1 Driver composition possible. That is, can economize 1 moule. In other words, Driver composition is available by IGBT or metal oxide semiconductor field effect transistor element 4. This is economical big gain.

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Two phase driver manufacture of Hybrid type Linear Pulse Motor and estimation (하이브리드형 선형펄스모터의 2상 구동드라이버 제작 및 평가)

  • Kim, Dong-Hee;Ahn, Jae-Young;Kang, Geon-Il;Kim, Kwang-Heon;Lim, Young-Cheol;Park, Sung-Jun
    • Proceedings of the KIEE Conference
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    • 2007.10c
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    • pp.28-30
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    • 2007
  • Need analysis of correct thrust for control performance improvement of HB-LPM (Hybrid type Linear Pulse Motor). It is difficult to analyze HB-LPM's thrust. In this paper, HB-LPM's thrust is expressed to mathematical expression. And it is proved validity of this numerical formula by thrust measurement system. Two phase driver is composed. It is verified validity of numerical formula that measure waveform of electric current and voltage that is supplied in each Phase. In this study, composed two phase drive driver, advantage of this IGBT element 6 by accumulated IPM module 1 Driver composition possible. That is, can economize 1 module. In other words, Driver composition is available by IGBT or metal oxide semiconductor field effect transistor element 4. This is economical big gains.

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A Study on the Design of a Control Circuit for Three- Phase Full Bridge Converter Using Microprocessor (마이크로프로세서를 이용한 3상 브리지 콘버터의 제어회로 설계에 관한 연구)

  • 노창주;김윤식;김영길;유진열;류승각
    • Journal of Advanced Marine Engineering and Technology
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    • v.16 no.4
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    • pp.102-112
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    • 1992
  • The three-phase full(6-pulse) bridge controlled rectifier is one of the most widely used types of solid-state converters in DC drive applications for higher performance. In most of the previous designs, the gate control circuits of the converter have been designed with analog method which can be easily affected by noise. Nowdays with advances of microelectronics and power electronics, microprocessor and pheripal LSIs are increasingly used for eliminating this problems. In this paper, a novel general-purpose microprocessor -based firing system and control scheme for a three-phase controlled rectifier bridge has been developed and tested. Using the phase relations between ${\Delta}$-Y transformer in power operation part, gate pulse of the converter is generated with real time process so that microprocessor may share its time to control algorithms efficiently. The firing angle of the converter is smoothly controlled in the range of 0 $^{\dirc}$ to 180$^{\dirc}$ with a fast respone and a constant open loop gain, even for the case where the converter is fed by a weak AC system of unregulated frequency. The hardware and software control circuit implementation built around a 80286 microprocessor is discussed, and the experimental results are given. This scheme uses less hardware components and has higher dynamic performance in variable speed DC drive applications.

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