• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.946-949
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• 2001

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5 kW prototype boost converter operating at 40kHz.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.203-205
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• 2006

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost-half-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switching mode and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft switching (ZVS) operation ranges and the power dissipation as compared with those of the previously developed high-frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation (PWM) and pulse density modulation (PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• 전력전자학회논문지
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• 제25권1호
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• pp.44-53
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• 2020

A bridgeless single-stage AC-DC converter for wireless power charging systems is proposed. This converter is composed of a PFC stage and a three-level hybrid DC-DC stage. The proposed converter can control the wide output voltage (200-450 V_DC) by the variable link voltage and the pulse-width voltage applied to the primary resonant circuit due to the phase-shifted modulation at a fixed switching frequency. Moreover, the input power factor and the total harmonic distortion can be improved by using the proposed converter. A 1 kW prototype was fabricated and validated through experimental results and analysis.

• Journal of Power Electronics
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• 제12권3호
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• 제13권1호
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• pp.70-76
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• 2013

For high power high step-down dc-dc conversion applications, conventional three-level dc-dc converters are subject to extreme duty cycles or increased volume and cost due to the use of transformers. In this paper, a transformerless three-level dc-dc buck converter with a high step-down conversion ratio is proposed. The converter comprises two asymmetrical half bridges, which are of the neutral point clamped structures. Therefore, the output pulse voltage of the converter can be obtained in terms of the voltage difference between the two half bridges. In order to realize harmonious switching of the converter, a modulation strategy with capacitor voltages self balance is presented. According to the deduced output dc voltage function, transformerless operation without extreme duty cycles can be implemented. Experimental results from a 1kW prototype verify the validity of the proposed converter. It is suitable for ship electric power distribution systems.

• 한국산학기술학회논문지
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• 제17권6호
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• pp.715-720
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• 2016

본 논문에서는, 휴대기기를 위한 PWM(Pulse Width Modulation), 전압모드 DC-DC 승압형 컨버터를 제안한다. 제안하는 컨버터는 현재 소형화 되어가고 있는 휴대기기 시장에 적합하도록 1 MHz의 스위칭 주파수를 사용하여 칩 면적을 줄였다. 제안하는 DC-DC 컨버터는 전력단과 제어단으로 이루어지며 전력단은 인덕터, 출력 커패시터, MOS 트랜지스터 등으로 구성되며 제어단은 연산증폭기, 밴드갭 회로, 소프트 스타트 블록, 히스테리시스 비교기와 비겹침 드라이버로 구성된다. 설계된 회로는 히스테리시스 비교기와 논오버랩 드라이버를 사용하여 낮은 전압에서 구동되는 휴대기기의 잡음의 영향을 줄이고 출력전압 리플을 감소시켰다. 제안하는 회로는 1-poly 6-metal CMOS 매그나칩/하이닉스 $0.18{\mu}m$ 공정을 사용하여 레이아웃을 진행하였다. 설계된 컨버터는 입력 전압 3.3 V, 출력전압 5 V, 출력전류 100 mA 출력전압 대비 1%의 출력 전압 리플과 1 MHz의 스위칭 주파수의 특성을 갖는다. 본 논문에서 제안하는 승압형 DC-DC 컨버터는 PDA, 휴대폰, 노트북 등 휴대용 전자기기 시장에 맞는 고효율, 소형화 컨버터로서 유용하게 사용 될 것으로 사료된다.

• Journal of Power Electronics
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• 제15권3호
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• pp.587-601
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• 2015

A high step-up dc-dc converter is proposed for photovoltaic power systems in this paper. The proposed converter consists of an input current doubler, a symmetrical switched-capacitor doubler and an active-clamp circuit. The input current doubler minimizes the input current ripple. The symmetrical switched-capacitor doubler is composed of two symmetrical quasi-resonant switched-capacitor circuits, which share the leakage inductance of the transformer as a resonant inductor. The rectifier diodes (switched-capacitor circuit) are turned off at the zero current switching (ZCS) condition, so that the reverse-recovery problem of the diodes is removed. In addition, the symmetrical structure results in an output voltage ripple reduction because the voltage ripples of the charge/pump capacitors cancel each other out. Meanwhile, the voltage stress of the rectifier diodes is clamped at half of the output voltage. In addition, the active-clamp circuit clamps the voltage surges of the switches and recycles the energy of the transformer leakage inductance. Furthermore, pulse-width modulation plus phase angle shift (PPAS) is employed to control the output voltage. The operation principle of the converter is analyzed and experimental results obtained from a 400W prototype are presented to validate the performance of the proposed converter.

• Journal of Power Electronics
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• 제7권1호
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• pp.28-37
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• 2007

A new PWM-controlled quasi-resonant converter for a high efficiency PDP sustaining power module is proposed in this paper. The load regulation of the proposed converter can be achieved by controlling the ripple of the resonant voltage across the resonant capacitor with a bi-directional auxiliary circuit, while the main switches are operating at a fixed duty ratio and fixed switching frequency. Hence, the waveforms of the currents can be expected to be optimized from the view-point of conduction loss. Furthermore, the proposed converter has good ZVS capability, simple control circuits, no high voltage ringing problem of rectifier diodes, no DC offset of the magnetizing current and low voltage stresses of power switches. In this paper, operational principles, features of the proposed converter, and analysis and design considerations are presented. Experimental results demonstrate that the output voltage can be controlled well by the auxiliary circuit using the PWM method.

• 전기전자학회논문지
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• 제13권2호
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• pp.208-215
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• 2009

본 논문에서는 DT-CMOS(Dynamic Threshold voltage CMOS) 스위칭 소자를 사용한 모바일 기기용 고 효율 전원 제어 장치(PMIC)를 제안하였다. 휴대기기에서 필요한 높은 출력 전압과 낮은 출력 전압을 제공하기 위하여, 부스트 변환기(Boost Converter)와 벅 변환기(Buck Converter)를 원칩(One-chip)으로 구현하였다. 그리고 높은 출력 전류에서 고 전력 효율을 얻기 위하여 PWM(Pulse Width Modulation) 제어 방식을 사용하여 PMIC를 구현하였으며, 낮은 온 저항을 갖는 DT-CMOS를 설계하여 도통 손실을 감소시켰다. Voltage-mode PWM 제어 회로와 낮은 온 저항 스위칭 소자를 사용하여 구현한 부스트 변환기와 벅 변환기는 100mA 출력 전류에서 92.1%와 95%의 효율을 구현하였으며, 1mA이하의 대기모드에서도 높은 효율을 구현하기 위하여 LDO를 설계하였다.

• 조명전기설비학회논문지
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• 제17권6호
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• pp.105-112
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• 2003

AC/DC 전력변환장치로서 위상제어 컨버터나 출력전압을 제어할 수 없는 다이오드 정류기는 역률저하 및 저차고조파 발생의 문제점을 가진다. 본 논문에서는 역률개선 및 고조파 감소의 문제점을 극복하기 위하여 3상 PWM AC/DC Boost 컨버터에 대해 연구하였다. 제안한 컨버터의 특성은 입력 단에 전류 센서 없이 전압 센서만을 사용하여 입력전류의 위상을 조정하는 비교적 간단한 알고리즘으로 단위역률을 구현하였으며, 일정 주파수로 스위칭 소자를 구동시키는 정현 PWM 방식을 채용하여 불규칙한 스위칭 주파수 방식에서 나타나는 입력필터의 설계 및 스위칭 소자 선정에 대한 어려움을 극복하였다. 본 논문에서 제안한 제어알고리즘을 시뮬레이션 한 결과 부하영역 및 발전영역에서도 단위역률이 잘 이루어졌으며 DC link 단의 출력전압이 거의 리플 없이 다이나믹한 응답특성을 보였다. 또 시뮬레이션으로 얻어진 회로정수를 바탕으로 인덕터 및 커패시터의 용량을 적절한 크기로 산정하여 실험 에 적용한 결과 같은 부하조건에서 다이오드 정류기와 비교하여 역률 및 저차 고조파가 현저하게 개선되었음을 알 수 있었다.