• 제목/요약/키워드: protection design

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적응보호를 위한 계층적 시스템의 기본구조 (Basic Structure for Hierarchical Adaptive Protection System)

  • 이승재;김기화;오정환;임동진
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 하계학술대회 논문집 B
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    • pp.584-587
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    • 1995
  • Recent development in the digital relay technology has introduced the adaptive relaying system which adopts the relays to the current operating states. This paper proposes the hierarchical digital protection system whose design has been based on 154 kV S/S. Applying the newest communication networking, the system provides the new protection capabilities improving the system reliability and speed.

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Design of SCR-Based ESD Protection Circuit for 3.3 V I/O and 20 V Power Clamp

  • Jung, Jin Woo;Koo, Yong Seo
    • ETRI Journal
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    • 제37권1호
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    • pp.97-106
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    • 2015
  • In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).

강의 음극방식에 미치는 표면상태와 유속의 영향 (The Effects of Surface Condition and Flow Rate to the Cathodic Protection Potential and Current on Steel)

  • Kyeong-soo, Chung;Seong- Jong, Kim;Myung-Hoon, Lee;Ki-Joon, Kim;Kyung-Man, Moon
    • Journal of Advanced Marine Engineering and Technology
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    • 제28권6호
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    • pp.972-980
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    • 2004
  • Cathodic protection is being widely used to protect steel structures in sea water environment, In order to protect steel structures completely, the flow condition of sea water surrounding with this structures and the surface condition of the structures must be considered for a desirable design of cathodic protection. In this study, the optimum protection potential and current density were investigated in terms of cathodic current density, surface condition and a flow condition of sea water. The optium protection potential of the cleaned specimen was -770 mV(SCE) and below. However in the case of the rusted specimen, its potential was -700 mV(SCE) and below, which was somewhat positive than the cleaned one irrespective of flow condition. The optimum cathodic protection current density for both the cleaned and rusted specimens was 100 mA/$\textrm{m}^2$, however, on the flow condition, 200 mA/$\textrm{m}^2$ to be supplied for cathodic protection of steel structures completely for both cleaned and rusted specimens.

Shared Protection of Lightpath with Guaranteed Switching Time over DWDM Networks

  • Chen Yen-Wen;Peng I-Hsuan
    • Journal of Communications and Networks
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    • 제8권2호
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    • pp.228-233
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    • 2006
  • Survivability is a very important requirement for the deployment of broadband networks because out of service links can affect volumes of traffic even if it is a very short time. And the data paths of broadband networks, which are critical for traffic engineering, are always necessary to be well protected. The procedure of protection or restoration for a path is initiated when failure is detected within the working path. In order to minimize the influence on transmission quality caused by the failure of links and to provide a definite time for the recovery from the failure, the protection switching time (PST) should be carefully considered in the path arrangement. Several researches have been devoted to construct the protection and restoration schemes of data paths over dense wavelength division multiplexing (DWDM) networks, however, there was rare research on the design of data paths with guaranteed protection switching time. In this paper, the PST-guaranteed scheme, which is based on the concept of short leap shared protection (SLSP), for the arrangement of data paths in DWDM networks is proposed. The proposed scheme provides an efficient procedure to determine a just-enough PST-guaranteed backup paths for a working path. In addition to selecting the PST-guaranteed path, the network cost is also considered in a heuristic manner. The experimental results demonstrate that the paths arranged by the proposed scheme can fully meet the desired PST and the required cost of the selected path is competitive with which of the shared path scheme.

350km/h급 고속전차선로 보호선의 선종결정 기법에 관한 연구 (A Study on the Protection Wire Type Decision of Catenary System in the 350km/h High Speed Line)

  • 이학표;서기범;박재영
    • 전기학회논문지
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    • 제64권12호
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    • pp.1818-1823
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    • 2015
  • In this paper, we analyzed the optimal configuration of protection wire that have been installed in the electric railway power supply system. Protection wires are to suppress the ground potential rise when the short circuit fault between contact wire-rail(C-F), and protect the electronics equipments(signalling and communication) that are facility the wayside. The role of protection wires must be feed back quickly the fault current to the substation when a short circuit fault occurs. In this paper, we proposed that only one line to install the protection wire. Comparing how to newly proposed and existing system, most of the performance is similar. The reason is that most of the current flowing in the protection wire near the location where the fault occurred. There is no problem even if in one line for human safe and the low impedance of the return circuit in dimension to ensure the safety of the facility during the fault. To ensure safety during an fault occurs, it is sufficient even by one line. But, In the protection wire of facilities planning it is necessary to design taking into account the potential utility.

Protection of MPEG-2 Multicast Streaming in an IP Set-Top Box Environment

  • Hwang, Seong-Oun;Kim, Jeong-Hyon;Nam, Do-Won;Yoon, Ki-Song
    • ETRI Journal
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    • 제27권5호
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    • pp.595-607
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    • 2005
  • The widespread use of the Internet has led to the problem of intellectual property and copyright infringement. Digital rights management (DRM) technologies have been developed to protect digital content items. Digital content can be classified into static content (for example, text or media files) and dynamic content (for example, VOD or multicast streams). This paper deals with the protection of a multicast stream on set-top boxes connected to an IP network. In this paper, we examine the following design and architectural issues to be considered when applying DRM functions to multicast streaming service environments: transparent streaming service and large-scale user environments. To address the transparency issue, we introduce a 'selective encryption scheme'. To address the second issue, a 'key packet insertion scheme' and 'hierarchical key management scheme' are introduced. Based on the above design and architecture, we developed a prototype of a multicasting DRM system. The analysis of our implementation shows that it supports transparent and scalable DRM multicasting service in a large-scale user environment.

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폭렬 현상을 고려한 RC 구조물의 PBD기반 구조내화설계 기술개발에 관한 연구(III) -일본의 내화안전성평가기법을 활용한 사례조사 연구- (A Study on the Structural Fire Resistance Performance Design of RC Structural according to the Explosive Spalling - A Case Study on the Evaluation Method of Structural Fire Resistance in Japan -)

  • 김세종;이재영;권영진
    • 한국화재소방학회:학술대회논문집
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    • 한국화재소방학회 2008년도 추계학술논문발표회 논문집
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    • pp.310-315
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    • 2008
  • The objective of design for a post flash-over fire is contain the fire and prevent structural collapse, as necessary to meet the performance requirements. In the post flash-over phase of a fire all of the combustible objects in the compartment are burning and the heat release rate is limited either by the fuel surface area or the available air supply. So for the PBD situations, the process of evaluation method for fire phenomena is very important. It is the aim of this study to investigate and analyze the evaluation method of structural fire resistance in Japan.

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새로운 구조의 ESD 보호소자를 내장한 고속-저전압 LVDS Driver 설계 (Design of high speed-low voltage LVDS driver circuit with the novel ESD protection device)

  • 이재현;김귀동;권종기;구용서
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.731-734
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    • 2005
  • In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.

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저 전압 트리거형 ESD 보호소자를 탑재한 LVDS Driver 설계 (The Design of LVDS Driver with ESD protection device of low voltage triggering characteristics)

  • 육승범;김귀동;권종기;구용서
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.805-808
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    • 2005
  • In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.

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온도 환경 변화에 따른 평판형 TV 모서리 파손 방지를 위한 구조 설계 연구 (Study on Corner Crack Protection for Various Thermal Environment in Flat Panel Displays)

  • 김민근;김성기
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2007년도 춘계학술대회A
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    • pp.678-682
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    • 2007
  • It is conducted that study on corner crack protection for various thermal environment in a flat panel display. Most of the consumer electronics consist of a plastic and a metal structure. And different properties of materials could cause failure of structural reliability due to the various operating temperatures. Especially for front bezel with thin and slender structure, the effect of temperature is significant, and the design for crack protection is crucial for thermal reliability of displays. In this study, it is prescribed the behavior of the front bezel in flat panel display for various operation temperatures and proposed design parameters to ensure the structural reliability of displays.

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