• 제어로봇시스템학회논문지
• /
• 제10권1호
• /
• pp.73-80
• /
• 2004

We have developed a general purpose motion controller using an FPGA(Field Programmable Gate Array). The multi-PID controllers and GUI are implemented as a system-on-chip for multi-axis motion control. Comparing with the commercial motion controller LM 629, since it has multi-independent PID controllers, we have several advantages such as space effectiveness, low cost and lower power consumption. In order to test the performance of the proposed controller, motion of the robot hand is controlled. The robot hand has three fingers with 2 joints each. Finger movements show that tracking was very effective. Another experiment of balancing an inverted pendulum on a cart has been conducted to show the generality of the proposed FPGA PID controller. The controller has well maintained the balance of the pendulum.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1987년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 16-17 Oct. 1987
• /
• pp.413-418
• /
• 1987

The software developed for the large scale Programmable Controller consists of the programmer's S/W, the Controller's S/W the RBC's (Remote Base Controller's) S/W and the Analog's S/W. The programmer's S/W, running on the Programmer, includes the editor, the compiler, the communication program, and some other programs for easy use. The Controller S/W, which requires the fast scanning time, consists of the BTI( Block Type Instruction) solving program, the timer service routine, the i/o update program, the communication program and etc. The RBC's S/W includes the communication program, the error recovery program and the i/o processing program. The analog S/W, controlled by the Programmer, includes the PID program. The data communication between the Programmer and the Controller the Controller and the RBC, and the RBC and the Analog are developed.

• 한국마린엔지니어링학회:학술대회논문집
• /
• 한국마린엔지니어링학회 2006년도 전기학술대회논문집
• /
• pp.249-250
• /
• 2006

In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

• International Journal of Control, Automation, and Systems
• /
• 제4권5호
• /
• pp.567-574
• /
• 2006

This paper presents the hardware implementation of a neural network controller for a nonlinear system with a micro-controller unit (MCU) and a field programmable gate array (FPGA) chip. As an on-line learning algorithm of a neural network, the reference compensation technique has been implemented on an MCU, while PID controllers with other functions such as counters and PWM generators are implemented on an FPGA chip. Interface between an MCU and a field programmable gate array (FPGA) chip has been developed to complete hardware implementation of a neural controller. The developed neural control hardware has been tested for balancing the inverted pendulum while controlling a desired trajectory of a cart as a nonlinear system.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
• /
• pp.1012-1017
• /
• 1993

In this paper, the instruction set and the architecture of a RISC processor for programmable logic controller is suggested. From the measurement of existing programs, the characteristics of ladder instructions are analyzed. The instruction set is defined so that the existing ladder program can be reused with simple translation. Because bit instructions controls the behavior of word instructions, the processor suits for high level language like SFC. Simulations show that the PLC with the suggested processor is twenty times faster than the PLC with the multi-purpose microprocessor.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
• /
• pp.407-413
• /
• 1988

The architecture of a multiprocessor based programmable controller(MBPC) is presented. It consists of a host processor, processing elements, and Input/Output processors. Some problems in implementing such architecture are also described. To resolve them, we proposed and presented INFOBUS, a system bus for MBPC. The performances of INFOBUS and MBPC are analysed using both analytic models and simulations. Some results from the analysis will be given and validated. In case of 50% of BTI(Block Type Instruction) and 4 processors, the scanning time is shown to be 0.194msec/Kstep with some reasonable assumptions.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1986년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 17-18 Oct. 1986
• /
• pp.175-177
• /
• 1986

본 연구에서는 금성계전에서 이미 개발된 고기능 PC인 STARCON-M에 적용 할 수 있는 Link 시스템을 구성하여 다음과 같은 결론을 얻을 수 있었다. 1) 병렬 Link 시스템을 구성하여 최대 입출력 점수가 280점인 PC를 최대 744점 프로그램 용량이 최대 12K Word까지 확장하여 사용 할 수 있었다. 2) 직렬 Link 시스템을 구성하여 완벽한 분산제어 시스템을 구성할 수 있었으며 Master와 Local의 비율을 1:7까지 할 수 있고 동축 cable에 의해 500m 까지 연결하므로서 PC의 효율성을 증가시켰다. 3) Computer Link 에 의해 PC와 Computer간에 Data를 교신하므로서 관리 감시 제어 시스템을 구성할 수 있었다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1998년도 하계학술대회 논문집 G
• /
• pp.2402-2404
• /
• 1998

This paper proposes a translation method that converts ladder diagrams to binary executable codes for PLC (programmable logic controller)s. A PLC based on general purpose DSP(digital signal processor) validates the method. We performed a benchmark on the system that compares the execution time of the interpretation method and ours. Experimenal result shows how fast this method executes programs that consist of codes generated.

• 전기의세계
• /
• 제33권9호
• /
• pp.569-579
• /
• 1984

• 전기저널
• /
• 9호통권141호
• /
• pp.27-31
• /
• 1988