• The KIPS Transactions:PartB
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• v.18B no.4
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• pp.173-180
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• 2011

This paper shows an approach for real-time object segmentation on GPU (Graphics Processing Unit) using CUDA (Compute Unified Device Architecture). Recently, many applications that is monitoring system, motion analysis, object tracking or etc require real-time processing. It is not suitable for object segmentation to procedure real-time in CPU. NVIDIA provide CUDA platform for Parallel Processing for General Computation to upgrade limit of Hardware Graphic. In this paper, we use adaptive Gaussian Mixture Background Modeling in the step of object extraction and CCL(Connected Component Labeling) for classification. The speed of GPU and CPU is compared and evaluated with implementation in Core2 Quad processor with 2.4GHz.The GPU version achieved a speedup of 3x-4x over the CPU version.

• International Journal of Automotive Technology
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• v.6 no.2
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• pp.171-181
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• 2005

The purpose of this paper is two-fold: 1) A novel algorithm in order to extract lane-related information from road images is presented; 2) Design specifications of an image processing onboard unit capable of extracting lane­related information in real-time is also presented. Obtaining precise information from road images requires many features due to the effects of noise that eventually leads to long processing time. By exploiting a FPGA and DSP, we solve the problem of real-time processing. Due to the fact that image processing of road images relies largely on edge features, the FPGA is adopted in the hardware design. The schematic configuration of the FPGA is optimized in order to perform 3 $\times$ 3 Sobel edge extraction. The DSP carries out high-level image processing of recognition, decision, estimation, etc. The proposed algorithm uses edge features to define an Edge Distribution Function (EDF), which is a histogram of edge magnitude with respect to the edge orientation angle. The EDF enables the edge-related information and lane-related to be connected. The performance of the proposed system is verified through the extraction of lane-related information. The experimental results show the robustness of the proposed algorithm and a processing speed of more than 25 frames per second, which is considered quite successful.

• The Transactions of the Korea Information Processing Society
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• v.6 no.7
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• pp.1941-1954
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• 1999

This paper presents a design and implementation of CRs(CHILL Run-time support System) to adapt the concurrent processing facilities of CHILL(CCITT High Level Language) which had recommended by ITU-T(International Telecommunication Union Telecommunication Standardization Sector). Because the CHILL provides more various concurrent processing facilities that other concurrent programming language, a design and implementation on CRS can give us real effects to gain the major functionalities and the techniques of the concurrent processing. In this paper, we design the interface rules of concurrent functions to conform with the CHILL compiler. We use the concurrent processing primitives as the library style to be invoked by procedure calls, and implement the start-up routine of the CHILL program, the context switching routine, and the CHILL process control parts to control be execution of the CHILL processes concurrently.

• Proceedings of the IEEK Conference
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• summer
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• pp.302-309
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• 2004

The transmission capacity of wireless communication systems may become dramatically high by employ multiple transmit and receive antennas with space-time coding techniques appropriate to multiple transmit antennas. For large number of transmit antennas and at high bandwidth efficiencies, the receiver may become too complex whenever correlation across transmit antennas is introduced. Reducing decoding complexity at receiver by combining array processing and space-time codes (STC) helps a communication system using STC to overcome the big obstacle that prevents it from achieving a desired high transmission rate. Multi-carrier CDMA (MC-CDMA) allows providing good performance in a channel with high inter-symbol interference. Antenna array, STC and MC-CDMA system have a similar characteristic that transmit-receive data streams are divided into sub-streams. Thus, there may be a noticeable reduction of receiver complexity when we combine them together. In this paper, the combination of array processing and STC in MC-CDMA system over slow selective-fading channel is investigated and compared with corresponding existing MC-CDMA system using STC. A refinement of this basic structure leads to a system design principle in which we have to make a trade off between transmission rate, decoding complexity, and length of spreading code to reach a given desired design goal.

• Korean Journal of Remote Sensing
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• v.29 no.2
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• pp.183-195
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• 2013

Real-time high-precision image georeferencing is important for the realization of image based precise navigation or sophisticated augmented reality. In general, high-precision image georeferencing can be achieved using the conventional simultaneous bundle adjustment algorithm, which can be performed only as post-processing due to its processing time. The recently proposed sequential bundle adjustment algorithm can rapidly produce the results of the similar accuracy and thus opens a possibility of real-time processing. However, since the processing time still increases linearly according to the number of images, if the number of images are too large, its real-time processing is not guaranteed. Based on this algorithm, we propose a modified fast algorithm, the processing time of which is maintained within a limit regardless of the number of images. Since the proposed algorithm considers only the existing images of high correlation with the newly acquired image, it can not only maintain the processing time but also produce accurate results. We applied the proposed algorithm to the images acquired with 1Hz. It is found that the processing time is about 0.02 seconds at the acquisition time of each image in average and the accuracy is about ${\pm}5$ cm on the ground point coordinates in comparison with the results of the conventional simultaneous bundle adjustment algorithm. If this algorithm is converged with a fast image matching algorithm of high reliability, it enables high precision real-time georeferencing of the moving images acquired from a smartphone or UAV by complementing the performance of position and attitude sensors mounted together.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.480-483
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• 1997

A fossil power plant can be modeled by a lot of algebraic equations and differential equations. When we simulate a large, complicated fossil power plant by a computer such as workstation or PC, it takes much time until overall equations are completely calculated. Therefore, new processing systems which have high computing speed is ultimately needed to develope real-time simulators. Vital points of real-time simulators are accuracy, computing speed, and deadline observing. In this paper, we present a enhanced strategy in which we can provide powerful computing power by parallel processing of DSP processors with communication links. We designed general purpose DSP modules, and a VME interface module. Because the DSP module is designed for general purpose, we can easily expand the parallel system by just connecting new DSP modules to the system. Additionally we propose methods about downloading programs, initial data to each DSP module via VME bus, DPRAM and processing sequences about computing and updating values between DSP modules and CPU30 board when the simulator is working.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 1990.10a
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• pp.23-27
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• 1990

A new signal processing system for real time displacement measurement in sinusoidal phase modulating interferometry is described. Although sinusoidal phase modulating interferometry is effective in measuring with high accuracy the displacement of an object, conventional signal processing takes a long time. In this method, detection of the object's displacement is easily achieved by sampling the interference signal at those times that satisfy certain conditions and by processing the sampled signals with electric circuits in real time. The delay time of this signal processing system is < 45${\mu}$s. Specially in this paper we describe all electronic circuit and optical system design

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.12A
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• pp.1246-1252
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• 2006

In this paper, a collision probability, processing time and traffic capacity analysis algorithm for RFID system using random FHSS and synchronous FHSS is proposed. Service time, duty cycle, traffic intensity and additional delay time required for re-transmission due to collision are considered and the processing delay and frequency channel capacity are analyzed for the steady state operation of the system. The simulation results which show maximum capacity of the system and explain the accuracy of the algorithm are provided.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2001.06a
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• pp.149-152
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• 2001

The goals of this papper are not only to maximize of performance but also to reduce the response time for the real-time printed alphabets recognition system using the backpropagation algorithm in the artificial neural network. The Genesis board and MIL(Matrox Image Library) package were used to real-time acquisition, processing and display of images. Through this experiment proved the possibility of real-time recognition processing by comparing response times of the system and proposing the method to reduce of order of the output vectors.

• Journal of Korean Institute of Industrial Engineers
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• v.24 no.3
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• pp.431-446
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• 1998

In this paper, we consider the problem of scheduling n jobs with sequence-dependent processing times on a set of parallel-identical machines. The processing time of each job consists of a pure processing time and a sequence-dependent setup time. The objective is to maximize the total remaining machine available time which can be used for other tasks. For the problem, we first propose a dynamic programming(DP) algorithm for sequencing jobs processed on a single machine. The algorithm is then extended to handle jobs on parallel-identical machines. Finally, we developed an improved version of the algorithm which generates optimal solutions using much smaller amount of memory space and computing time. Computational results are provided to illustrate the performance of the DP algorithms.