• Proceedings of the KIEE Conference
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• 2006.11a
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• pp.21-23
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• 2006

As a general rule for evaluating dependability of a system, reliability is commonly considered which barely rays attention to the system behavior, however the estimation is based on the assumption of a fault-frost system, which may be impracticable and inaccurate especially for complicated system. This paper introduces a security and dependability integrated approach to analyze the availability of a fault-active system both from dependability and security points of view. Two fault modes involved are discussed about the impairment to the system reliance. The approach can be well applied to estimate and quantify the attribute of system robustness with the help of Markov chain process, which is good at solving status related problem. The comparison result between dual system and IEC61850-based almighty backup system is shown to sup-port the suggested approach.

• Proceedings of the KIEE Conference
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• 2004.07d
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• pp.2230-2232
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• 2004

A residual generation scheme that can be employed in the process fault detection and isolation systems for a class of nonlinear (control) systems is suggested. Although the scheme is a kind of observer scheme, the design of the observers employed for residual generation is very simple and the order of the observer is very low. In spite of the simplicity, the residual generation scheme provides the same information for the detection and isolation of the anticipated faults as the conventional multiple observer based schemes. The residuals may be structured so that fault isolation can be performed by pre-selected logic. An FDIS using the residual generation scheme is constructed and evaluated for a nonlinear DC motor system.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.157.5-157
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• 2001

Generally, the application of Programmable Logic Controller PLC is emphasized on the Process Control. This paper presents Neurofuzzy application, Which can estimate the distance to a fault by means of PLC and based up on the Electrical Power System theory and ground resistance. The case study refers to the distribution lines of the Provincial Electricity Authority (PEA). Also, the thesis is supposed to be of much benefit: saving time both to go to the scene and to clear fault, reducing unpleasant impacts on customers and stabilizing reliability of the distribution lines.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.8
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• pp.1948-1957
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• 1996

The conformance testing of communication protocol is the process to evaluate whether the protocol implemented is identified with standard specification. By evaluating how generated test cases detect many faults, it can be used with standard estimating efficiency of conformance testing. The method that evaluates the capability of fault coverage for test cases, has been researched by mathematical analysis and simulation. In this paper, we pointed out the problem of existing method and proposed new evaluation model of fault covergage for test case which generated by foult model. Also, we analyzed the results comparing to the existing evaluation method and proved its validity.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.10
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• pp.1021-1028
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• 1990

This paper deals with the development of an expert system for the fault diagnosis in a power system. The expert system is designed to estimate the fault sections with explanation about the propagation of the faults through the identification of false operation of protective devices. The identification of black-out area is also considered to assist the restoration process. As for the inference scheme, backward chaining method is adopted and the search space is reduced for the better performance. The expert system was developed using PROLOG language. Its application to a sample power system showed satisfactory result.

• Tribology and Lubricants
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• v.18 no.2
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• pp.117-126
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• 2002

Abstract - An integrated condition monitoring algorithm based on an expert system was implemented in this work in order to monitor effectively the machine conditions. The knowledge base was consisted of numeric data which meant the posterior probability of each measurement parameter for the representative machine failures. Also the inference engine was constructed as a series of statistical process, where the probable machine fault was inferred by a mapping technology of pattern recognition. The proposed algorithm was, through the user interface, applied for an air compressor system where the temperature, vibration and wear properties were measured simultaneously. The result of the case study was found fairly satisfactory in the diagnosis of the machine condition since the predicted result was well correlated to the machine fault occurred.

• Journal of Electrical Engineering and information Science
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• v.2 no.3
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• pp.14-21
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• 1997

In delay-optimized designs, timing failures due to manufacturing delay defects are more likely to occur because the average timing slacks of paths decrease and the system becomes more sensitive to smaller delay defect sizes. In this paper, the impact of delay optimized logic circuits on delay fault testing will be discussed and compared to the case for non-optimized designs. First, we provide a timing optimization procedure and show that the resultant density function of path delays is a delta function. Next we also discuss the impact of timing optimization on the yield of a manufacturing process and the defect level for delay faults. Finally, we will give some recommendations on the determination of the system clock time so that the delay-optimized design will have the same manufacturing yield as the non-optimized design and on the determination of delay fault coverage in the delay-optimized design in order to have the same defect-level for delay faults as the non-optimized design, while the system clock time is the same for both designs.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.359-362
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• 2000

In this paper, we propose a test pattern generation algorithm on the basis of the identification of undetectable faults for Speed-Independent(SI) asynchronous control circuits. The proposed methodology generates tests from the specification of a target circuit, which describes the behavior of the circuit in the form of Signal Transition Graph (STG). The proposed identification method uses only topological information of a target circuit and reachability information of a fault-free circuit, which is generated in the form of Binary Decision Diagram(BDD) during pre-processing. Experimental results show that high fault coverage over single input stuck-at fault model is obtained for several synthesized SI circuits and the use of the identification process as a preprocessing decreases execution time of the proposed test generation with negligible costs.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.4
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• pp.444-451
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• 1999

A diagnostic rule-base design method for enhancing fault detection and isolation performance of multiple obsever based fault detection isolation schemes (FIDS) is presented. The diagnostic rule-base has a hierarchical framework to perform detection and isolation of faults of interest, and diagnosis of process faults. The decision unit comprises a rule base and a fuzzy inference engine and removes some difficulties of conventional decision unit which includes crisp logic with threshold values. Emphasis is placed on the design and evaluation methods of the diagnostic rult-base. The suggested scheme is applied to the FDIS design for a DC motor driven centrifugal pump system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.882-885
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• 2011

This paper presents testing and self-calibration of RF circuits using MEMS switches to identify process-related defects and out of specification circuits. We have developed a novel multi-tone dither test technique where the test stimulus is generated by modulating the RF carrier signal with a multi-tone signal generated using an Arbitrary Waveform Generator (AWG) with additive white Gaussian noise. This test stimulus is provided as input to the RF circuit and peak-to-average ratio (PAR) is measured at the output. For a faulty circuit, a significant difference is observed in the value of PAR as compared to a fault-free circuit. Simulation is performed for various circuit conditions such as fault-free as well as fault-induced and their corresponding PARs are stored in the look-up table. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.