• Title/Summary/Keyword: prefix

Search Result 319, Processing Time 0.023 seconds

Automatic Generation of Custom Advertisement Messages based on Literacy Styles of Classified Personality Types (성격유형별 문체 특성 기반 맞춤형 광고 메시지 자동생성 연구)

  • Jimin Seong;Yunjong Choi;Doyeon Kwak;Hansaem Kim
    • Annual Conference on Human and Language Technology
    • /
    • 2022.10a
    • /
    • pp.431-436
    • /
    • 2022
  • 이 연구는 MBTI의 심리 기능지표 조합인 ST, SF, NT, NF의 유형별 특징을 반영한 마케팅 문체 프레임워크를 정의하고 모델 학습을 통해 성격유형별 맞춤화 된 광고 메시지로 생성하는 것을 목적으로 한다. 활용되는 광고 메시지 자동 생성 기술은 BART 모델에 성격유형을 Prefix로 포함한 광고문을 학습시켜 성격유형에 따라 맞춤형 광고 메시지를 생성하는 방식이다. 학습된 모델은 Prefix 조작만으로 MBTI 성격유형별 문체 특징을 갖춘 광고 메시지로 변환되는 것을 실험을 통해 확인할 수 있었다. 본 연구는 성격유형의 특징을 문체 프레임워크로써 정의하고 이에 기반한 모델 학습을 통해 성격유형별 특징을 반영한 광고 메시지를 재현해 낼 수 있다는 점에서 의의가 있다. 또한 성격유형과 연관 feature를 함께 학습하여 유형별 문체 특징과 소구점을 포함한 광고 메시지를 생성했다는 기술적 가치가 있다. 이 연구 결과를 기반으로 차후 타겟 고객층의 성격유형과 광고 도메인을 고려한 효과적인 광고 콘텐츠를 생성해 내는 모델을 개발하여 타겟 마케팅 분야는 물론이고 지역별 또는 언어별 문체 간 차이를 구조화하거나 재현해야 하는 문제에서 기반이 되는 연구로 활용될 수 있을 것으로 기대된다.

  • PDF

FPGA Performance Evaluation According to HDL Coding Style (HDL 코딩 방법에 따른 FPGA에서의 성능 실험 및 평가)

  • Lee, Sangwook;Lee, Boseon;Lee, Seungeun;Suh, Taeweon
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2011.11a
    • /
    • pp.62-65
    • /
    • 2011
  • FPGA는 대용량의 게이트를 지원하는 하드웨어를 프로그램 할 수 있는 디바이스이다. ASIC을 위해 설계된 로직은 칩으로 제조되기 전에 검증 과정을 거친다. 이 검증 과정에서 시뮬레이션의 한계를 극복하기 위해 FPGA를 사용한 에뮬레이션 방법을 많이 채택한다. 에뮬레이션 과정에서 ASIC의 동작 속도로 검증하는 것이 바람직하지만 FPGA의 특성상 ASIC과 같은 속도로 동작하기는 쉽지 않은 것이 현실이다. 본 논문에서는 HDL 코딩 방법에 따른 FPGA의 성능 민감도를 실험하였다. 실험 및 평가를 위해 다양한 알고리즘을 가진 가산기를 이용하였고 각 가산기 종류와 비트수에 따라 Verilog-HDL을 이용하여 코딩하였으며 대표적인 FPGA 제조사(Altera와 Xilinx)별, 디바이스별로 동작 속도와 자원 사용량을 측정하였다. 실험 결과 FPGA 제조사별로 다른 경향을 보임을 확인하였다. 성능 면에서는 비트별로 다소 차이는 있지만 Altera 디바이스에서는 Ripple Carry, Carry Lookahead 가산기보다 Prefix 가산기의 성능이 우수하게 나왔다. Xilinx 디바이스에서는 예상과 달리 가산기들 사이의 성능 차이가 크게 나지 않았으며 Ripple Carry, Carry Lookahead 가산기가 Prefix 가산기보다 높은 성능을 보이는 경우도 있었다. 비용 면에서는 디바이스별로 큰 차이가 나지 않았으며 ASIC과 비슷한 성능 민감도를 보였다. 그리고 각 제조사에서 제공하는 IP(Intellectual Property) Core를 사용했을 경우는 대부분의 디바이스에서 우수한 성능을 보여 주었다. TSMC 90nm 공정 기술로 제작한 ASIC과 IP Core를 비교했을 때는 ASIC의 성능이 4배 정도 우수한 것으로 나타났다.

SC-FDE System Using Decision-Directed Method Over Time-Variant Fading Channels (시변 페이딩 채널에 대한 결정 지향 방식의 SC-FDE 시스템)

  • Kim, Ji-Heon;Yang, Jin-Mo;Kim, Whan-Woo
    • The Journal of the Acoustical Society of Korea
    • /
    • v.26 no.6
    • /
    • pp.227-234
    • /
    • 2007
  • This paper describes a transmission method based on a single carrier with frequency domain equalization (SC-FDE) scheme with cyclic prefix(CP). The SC-FDE has similar features with orthogonal frequency division multiplexing(OFDM). Similar to OFDM, a SC-FDE system is computationally efficient since equalization is reformed on a block of data in the frequency domain. Especially, it has the advantage of low sensitivity to nonlinear distortion compared to OFDM. In this paper, we design a SC-FDE receiver using decision-directed method, and present simulation results.

Branching Path Query Processing for XML Documents using the Prefix Match Join (프리픽스 매취 조인을 이용한 XML 문서에 대한 분기 경로 질의 처리)

  • Park Young-Ho;Han Wook-Shin;Whang Kyu-Young
    • Journal of KIISE:Databases
    • /
    • v.32 no.4
    • /
    • pp.452-472
    • /
    • 2005
  • We propose XIR-Branching, a novel method for processing partial match queries on heterogeneous XML documents using information retrieval(IR) techniques and novel instance join techniques. A partial match query is defined as the one having the descendent-or-self axis '//' in its path expression. In its general form, a partial match query has branch predicates forming branching paths. The objective of XIR-Branching is to efficiently support this type of queries for large-scale documents of heterogeneous schemas. XIR-Branching has its basis on the conventional schema-level methods using relational tables(e.g., XRel, XParent, XIR-Linear[21]) and significantly improves their efficiency and scalability using two techniques: an inverted index technique and a novel prefix match join. The former supports linear path expressions as the method used in XIR-Linear[21]. The latter supports branching path expressions, and allows for finding the result nodes more efficiently than containment joins used in the conventional methods. XIR-Linear shows the efficiency for linear path expressions, but does not handle branching path expressions. However, we have to handle branching path expressions for querying more in detail and general. The paper presents a novel method for handling branching path expressions. XIR-Branching reduces a candidate set for a query as a schema-level method and then, efficiently finds a final result set by using a novel prefix match join as an instance-level method. We compare the efficiency and scalability of XIR-Branching with those of XRel and XParent using XML documents crawled from the Internet. The results show that XIR-Branching is more efficient than both XRel and XParent by several orders of magnitude for linear path expressions, and by several factors for branching path expressions.

Longest First Binary Search on Prefix Length for IP Address Lookup (최장 길이 우선 검색에 기초한 프리픽스 길이에 따른 이진 IP 검색 구조)

  • Chu Ha-Neul;Lim Hye-Sook
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.8B
    • /
    • pp.691-700
    • /
    • 2006
  • Based on the destination IP address of incoming packets, the Internet routers determine next hops and forward packets toward final destinations through If address lookup. The bandwidth of communication links increases exponentially fast as well as the routing table size grows significant as the number of single host networks attached to the Internet increases. Since packets should be processed at wire-speed, the increased link speed reduces the processing time of a packet in routers, and hence more efficient and fast IP address lookup algorithms and architectures are required in the next generation routers. Most of the previous IP lookup schemes compare routing prefixes of shorter length first with a given input IP address. Since IP address lookup needs to find the most specific route of the given input, search continues until the longest matched prefix is found while it keeps remembering the current test matching prefix. In this paper, based on binary search on prefix length, we proposed a new IP address lookup algorithm which compares longer prefixes first. The proposed scheme is consisted of multiple tries with prefixes on leaves only. The trie composed of the longest prefixes is primarily searched whether there is a match with the given input. This processing is repeated for the trio of the next longer prefixes until there finds a match. Hence the proposed algorithm provides the fast search speed. The proposed algorithm also provides the incremental update of prefixes while the previous binary search on length scheme does not provide the incremental update because of pre-processing requirement. In this paper, we performed extensive simulations and showed the performance comparisons with related works.

A Bit-Map Trie for the High-Speed Longest Prefix Search of IP Addresses (고속의 최장 IP 주소 프리픽스 검색을 위한 비트-맵 트라이)

  • 오승현;안종석
    • Journal of KIISE:Information Networking
    • /
    • v.30 no.2
    • /
    • pp.282-292
    • /
    • 2003
  • This paper proposes an efficient data structure for forwarding IPv4 and IPv6 packets at the gigabit speed in backbone routers. The LPM(Longest Prefix Matching) search becomes a bottleneck of routers' performance since the LPM complexity grows in proportion to the forwarding table size and the address length. To speed up the forwarding process, this paper introduces a data structure named BMT(Bit-Map Tie) to minimize the frequent main memory accesses. All the necessary search computations in BMT are done over a small index table stored at cache. To build the small index table from the tie representation of the forwarding table, BMT represents a link pointer to the child node and a node pointer to the corresponding entry in the forwarding table with one bit respectively. To improve the poor performance of the conventional tries when their height becomes higher due to the increase of the address length, BMT adopts a binary search algorithm for determining the appropriate level of tries to start. The simulation experiments show that BMT compacts the IPv4 backbone routers' forwarding table into a small one less than 512-kbyte and achieves the average speed of 250ns/packet on Pentium II processors, which is almost the same performance as the fastest conventional lookup algorithms.

The Bit-Map Trip Structure for Giga-Bit Forwarding Lookup in High-Speed Routers (고속 라우터의 기가비트 포워딩 검색을 위한 비트-맵 트라이 구조)

  • Oh, Seung-Hyun;Ahn, Jong-Suk
    • Journal of KIISE:Information Networking
    • /
    • v.28 no.2
    • /
    • pp.262-276
    • /
    • 2001
  • Recently much research for developing forwarding table that support fast router without employing both special hardware and new protocols. This article introduces a new forwarding data structure based on the software to enable forwarding lookup to be penormed at giga-bit speed. The forwarding table is known as a bottleneck of the routers penormance due to its high complexity proportional to the forwarding table size. The recent research that based on the software uses a Patricia trie and its variants. and also uses a hash function with prefix length key and others. The proposed forwarding table structure construct a forwarding table by the bit stream array in which it constructs trie from routing table prefix entries and it represents each pointer pointing the child node and the associated forwarding table entry with one bit The trie structure and routing prefix pointer need a large memory when representing those by linked-list or array. but in the proposed data structure, the needed memory size is small enough since it represents information with one bit. Additionally, by use a lookup method that start searching at desired middle level we can shorten the search path. The introduced data structure. called bit-map trie shows that we can implement a fast forwarding engine on the conventional Pentium processor by reducing the backbone routing table fits into Level 2 cache of Pentium II processor and shortens the searching path. Our experiments to evaluate the performance of proposed method show that this bit-map trie accomplishes 5.7 million lookups per second.

  • PDF

A Study on the Multi-Carrier System for Throughput Enhancement in Underwater Channel Environments (수중 채널 환경에서 전송량 증대를 위한 다중반송파 시스템에 관한 연구)

  • Kim, Min-sang;Cho, Dae-young;Ko, Hak-lim;Hong, Dae-Ki;Kim, Seung-geun;Im, Tae-ho
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.40 no.6
    • /
    • pp.1193-1199
    • /
    • 2015
  • Studies applying multiple carrier method such as OFDM(Orthogonal Frequency Division Multiplexing) or FMT(Filtered Multi-Tone) to Underwater acoustic communication(UAC) system are actively under way as UAC is utilized in the various fields and the demand of high speed data transmission increases. In the existing OFDM method, the use of virtual carrier, which is inserted not to affect the adjacent channel in the frequency domain, and the cyclic prefix, which is used to reduce the impact of Inter Symbol Interference and Inter Channel Interference, decrease the throughput. In particular, the length of cyclic prefix to be used becomes longer under water since underwater has a rapidly changing channel characteristic, and the data throughput diminishes because it has to allocate more subcarrier on virtual carrier. This study therefore suggests FMT-OFDM system, a combination of OFDM and FMT, for the purpose of enhanced throughput in the underwater channel environment. Besides, in this study, channel is modeled based on data measured in real sea and the performance is analyzed after setting system parameters.

Hilbert Cube for Spatio-Temporal Data Warehouses (시공간 데이타웨어하우스를 위한 힐버트큐브)

  • 최원익;이석호
    • Journal of KIISE:Databases
    • /
    • v.30 no.5
    • /
    • pp.451-463
    • /
    • 2003
  • Recently, there have been various research efforts to develop strategies for accelerating OLAP operations on huge amounts of spatio-temporal data. Most of the work is based on multi-tree structures which consist of a single R-tree variant for spatial dimension and numerous B-trees for temporal dimension. The multi~tree based frameworks, however, are hardly applicable to spatio-temporal OLAP in practice, due mainly to high management cost and low query efficiency. To overcome the limitations of such multi-tree based frameworks, we propose a new approach called Hilbert Cube(H-Cube), which employs fractals in order to impose a total-order on cells. In addition, the H-Cube takes advantage of the traditional Prefix-sum approach to improve Query efficiency significantly. The H-Cube partitions an embedding space into a set of cells which are clustered on disk by Hilbert ordering, and then composes a cube by arranging the grid cells in a chronological order. The H-Cube refines cells adaptively to handle regional data skew, which may change its locations over time. The H-Cube is an adaptive, total-ordered and prefix-summed cube for spatio-temporal data warehouses. Our approach focuses on indexing dynamic point objects in static spatial dimensions. Through the extensive performance studies, we observed that The H-Cube consumed at most 20% of the space required by multi-tree based frameworks, and achieved higher query performance compared with multi-tree structures.

Low-Complex Timing Synchronization Algorithm for OFDM System (OFDM 수신기를 위한 낮은 복잡도의 초기 시간 동기 알고리즘)

  • 남광호;이태흥
    • Proceedings of the Korea Multimedia Society Conference
    • /
    • 2002.11b
    • /
    • pp.613-616
    • /
    • 2002
  • 본 논문은 OFDM의 Cyclic Prefix를 사용하여 적은 계산랑을 통해 보다 빠른 초기 시간동기획득을 구현하였다. QPSK 매핑 신호를 입력으로 하고 수신단에서 계산의 복잡도를 줄이기 위해 실수 부와 허수 부를 양자화를 하고 양자화된 신호를 이용하였다. 또한 양자화된 신호의 개수를 줄이는 방법으로 샘플링을 통해 기존의 상관성 알고리즘에 적용할 데이터 량을 줄였다. 즉, 계산량과 복잡도를 줄여 초기 시간 동기 획득률을 유지하면서 복잡도를 줄였다.

  • PDF