• Journal of Power Electronics
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• 제19권2호
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• pp.602-611
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• 2019

The major drawbacks of magnetic resonant coupled wireless power transfer (WPT) to the embedded sensors on spindles are transmission instability and low efficiency of the transmission. This paper proposes a novel double-loop coil design for wirelessly charging embedded sensors. Theoretical and finite-element analyses show that the proposed coil has good transmission performance. In addition, the power transmission capability of the double-loop coil can be improved by reducing the radius difference and width difference of the transmitter and receiver. It has been demonstrated by analysis and practical experiments that a magnetic resonant coupled WPT system using the double-loop coil can provide a stable and efficient power transmission to embedded sensors.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 E
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• pp.2152-2154
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• 1999

In this paper, we suggested the design rule of high-voltage rectangular waveform generator working in low frequency domain (5Hz $\sim$ 60Hz). Most of the commonly used power electronic switching devices have voltage ratings up to several kV. So it is difficult to design and fabricate high-voltage switching systems with the power electronic devices alone. We have combined IGBTC(1200V, 50A) with the specially designed transformer to get the high-voltage rectangular waveforms up to 40kV. In this work. next two things are the main factors. The first one is design of transformer working low-frequency domain close to 5Hz. And the second one is additional voltage source to floating the transformer voltage output. As a result, we can get frequency-variable and high-voltage rectangular voltage waveform and this can be a more efficient power source of sandpaper manufacturing process.

• 한국광학회지
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• 제12권6호
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• pp.489-495
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• 2001

난반사체를 이용한 다이오드 횡여기 Nd:YAG 레이저 헤드의 설계코드를 개발하여 레이저 결정 내 홉수된 빔의 균일성과 최대 레이저 출력을 갖는 설계요소의 조건에 관해 분석하고, 수치해석 방법으로 열렌즈 효과를 고려한 레이저 공진기의 레이저 출력을 계산하고 실험치와 비교 분석하였다. 1,080W의 여기광 출력에서 측정된 약 504 W의 레이저 출력은 열렌즈 효과를 고려하여 수치 해석적으로 계산된 레이저 출력과 레이저 공진기의 안정영역에서 거의 일치함을 확인하였다.

• 동력기계공학회지
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• 제15권4호
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• pp.11-18
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• 2011

A Shock absorber is one of the most important components in vehicle suspension systems. In general, many repeated analyses are required for the design of a shock absorber to satisfy the suspension characteristics of a specific automobile, like fluid flow analysis and mechanical analysis. The purpose of this study is to develop a fast design tool for shock absorber designers. One of the efficient solutions for this can be an empirical design method considering phenomenological effects from the shock absorber design variables. In order to extract the shock absorber's experimental characteristics, we used Taguchi method. This method showed that which design variables have major effects for the shock absorber's damping characteristics. This empirical design method also showed the direction of the design changes to satisfy the designer's intension.

• Journal of Communications and Networks
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• 제16권1호
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• pp.36-44
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• 2014

Exploiting the energy-delay tradeoff for energy saving is critical for developing green wireless communication systems. In this paper, we investigate the delay-constrained energy-efficient packet transmission. We aim to minimize the energy consumption of multiple randomly arrived packets in an additive white Gaussian noise channel subject to individual packet delay constraints, by taking into account the practical on-off circuit power consumption at the transmitter. First, we consider the offline case, by assuming that the full packet arrival information is known a priori at the transmitter, and formulate the energy minimization problem as a non-convex optimization problem. By exploiting the specific problem structure, we propose an efficient scheduling algorithm to obtain the globally optimal solution. It is shown that the optimal solution consists of two types of scheduling intervals, namely "selected-off" and "always-on" intervals, which correspond to bits-per-joule energy efficiency maximization and "lazy scheduling" rate allocation, respectively. Next, we consider the practical online case where only causal packet arrival information is available. Inspired by the optimal offline solution, we propose a new online scheme. It is shown by simulations that the proposed online scheme has a comparable performance with the optimal offline one and outperforms the design without considering on-off circuit power as well as the other heuristically designed online schemes.

• 전자공학회논문지SC
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• 제40권6호
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• pp.31-38
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• 2003

단열회로를 이용한 16-bit 저전력 마이크로프로세서를 설계하였다. 본 논문에서 설계한 마이크로프로세서는 콘트롤 블록, 멀티포트 레지스터 파일, 프로그램 카운터 그리고 ALU로 구성되어 있다. 또한 저전력 단열 프로세서에 필요한 효율적인 4-phase 전원클럭 발생기도 설계하였다. 단열회로는 ECRL(Efficient Charge Recovery Logic)을 기반으로 설계되었고 0.35㎛ CMOS 공정을 이용하여 구현하였다. 단열프로세서와 일반적인 프로세서와 에너지를 비교하기 위해서 CMOS를 기반으로 한 프로세서를 설계하여 에너지 비교를 수행하였다. 시뮬레이션 결과 기존의 CMOS 프로세서보다 2.9∼3.1배의 에너지 감소효과를 보였다.

• 한국CDE학회논문집
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• 제14권2호
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• pp.96-104
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• 2009

It gradually becomes important to study on how to efficiently integrate and manage plant lifecycle data such as 2D schematic and 3D solid data, logical configuration data, and equipment specifications data. From this point of view, converting plant design data from various systems into neutral data independent from any commercial systems is one of important technologies for the operation and management of plants which usually have a very long period of life. In order to achieve this goal, a neutral model for efficient integration and management of plant data was defined. After schema mapping between one of specification-driven plant design systems and the neutral model was performed, a plant data translator is also implemented according to the mapping result. Finally, by experiments with nuclear power plant design, the feasibility of the translator was demonstrated.

• 시스템엔지니어링학술지
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• 제20권spc1호
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• pp.97-107
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• 2024

Efforts to respond to climate change are being made in various ways around the world, and in the energy field, continuous research and pilot projects are underway through new and renewable energy, efficient power grid management, and power grid services. Systems are in place to realize these efforts, and the systems created allow for better effectiveness. When implementing a system, systems engineering methodology helps design a more systematic system and can provide verification accuracy and uniformity through intuitive connectivity. In this paper, the original requirements of the power grid stabilization system and the architecture of the system's essential constraints are constructed as a conceptual model and the boundaries and flows between components are defined. By utilizing distributed resources such as EV(Electric Vehicle) and ESS(Energy Storage System) in the power service platform system, we plan to design and build a next-generation power service system that can participate in the power stabilization market and implement a system necessary to respond to climate change in the future.

• 한국정보통신학회논문지
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• 제12권11호
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• pp.2039-2044
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• 2008

FIR 필터, DCT, FFT와 같은 디지털 신호처리 응용에서 다중 고정 계수 곱셈의 효율적인 하드웨어 구현문제에 자주 접하게 된다. 고정계수 곱셈기 설계에서 공통 하위식 제거 알고리즘은 면적과 전력소모를 상당히 개선시킬 수 있는 방법을 제공한다. 본 논문에서는 CSD 계수에서 빈번히 나타나는 두 공통 하위식($10{\bar{1}}$, 101)의 덧셈을 수행하는 전용덧셈기 설계 방법을 제안한다. 제안한 방법을 radix-24 FFT 구조의 고정계수 곱셈블록에 적용한 실험에서 제안한 방법의 면적, 지연시간, 전력소비는 기존방법 보다 각각 21%, 11%, 12% 정도 향상됨을 보인다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권3호
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• pp.473-482
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• 2017

Hand gesture recognition is regarded as new Human Computer Interaction (HCI) technologies for the next generation of mobile devices. Previous hand gesture implementation requires a large memory and computation power for hand segmentation, which fails to give real-time interaction with mobile devices to users. Therefore, in this paper, we presents a low latency and memory-efficient hand segmentation architecture for natural hand gesture recognition. To obtain both high memory-efficiency and low latency, we propose a streaming hand contour tracing unit and a fast contour filling unit. As a result, it achieves 7.14 ms latency with only 34.8 KB on-chip memory, which are 1.65 times less latency and 1.68 times less on-chip memory, respectively, compare to the best-in-class.