• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.1-8
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• 2009

In this paper, a temperature variation-insensitive power-up detector for use in analog and digital integrated systems has been proposed. To provide temperature-insensitive characteristic, nMOS and pMOS voltage dividers in the proposed power-up detector are made to have zero temperature coefficient by exploiting the fact that the effective gate-source voltage of a MOS transistor can result in mutual compensation of mobility and threshold voltage for temperature independency. Comparison results using a 68-nm CMOS process indicate that the proposed power-up detector achieves as small as 4 mV voltage variation at 1.0 V power-up voltage over a temperature range of $-30^{\circ}C$ to $90^{\circ}C$, resulting in 92.6% reduction on power-up voltage variations over conventional power-up detectors.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.349-350
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• 2006

정부의 배전분할 유보결정에 따라 전력거래소에서는 현행 발전경쟁시장의 효율성 향상을 위한 많은 사업을 추진하고 있다. 그중 우선적으로 추진하였던 사업이 도매전력시장을 대비해 구축한 시장운영시스템(MOS; Market Operation System)을 현행 계통운영을 담당하고 있는 급전 자동화시스템(EMS; Energy Management System)과의 연계활동이다. 이는 시장운영시스템(MOS)에 내재되어 있는 최첨단 기능중에서 일부를 현행 전력시장에 적용함으로써 계통운영의 효율성 향상뿐만 아니라 계통운영기술을 선진화하는 것이다. 특히, 기존 급전시스템에 비해 가장 두드러지는 점은 발전기들에 대한 에너지 및 예비력 급전계획을 사전적으로 5분단위로 최적화하여 수립하고 이를 발전기들에게 송신함으로써 경제적이며 안정적인 전력계통운영을 가능하게 해 줄 수 있는 것이다. 이를 가능하게 하기 위해서는 바로 정확한 미래 수요수준의 결정이 필수불가결한 요소이다. 따라서 본 논문에서는 MOS-EMS 연계활용에서의 실시간 수요예측의 중요성과 기존 제작사의 알고리즘과 국내 전력수요특성간의 불일치점 그리고 이를 해결하고자 모색했던 방안들에 대하여 설명하고자 한다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.35-41
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• 2008

This paper presents the design method of current-mode signal processing for high speed and low power digital audio signal processing. The digital audio processor requires a digital signal processing such as fast Fourier transform (FFT), which has a problem of large power consumption according to the settled point number and high speed operation. Therefore, a current-mode signal processing with a switched Current (SI) circuit was employed to the digital audio signal processing because a limited battery life should be considered for a low power operation. However, current memory that construct a SI circuit has a problem called clock-feedthrough. In this paper, we examine the connection of dummy MOS that is the common solution of clock-feedthrough and are willing to calculate the relation of width between dummy MOS for a proposal of the design methodology for improvement of current memory. As a result of simulation, in case of that the width of memory MOS is 20um, ratio of input current and bias current is 0.3, the relation of width between switch MOS and dummy MOS is $W_{M4}=1.95W_{M3}+1.2$ for the width of switch MOS is 2~5um, it is $W_{M4}=0.92W_{M3}+6.3$ for the width of switch MOS is 5~10um. Then the defined relation of MOS transistors can be a useful design guidance for a high speed low power digital audio processor.

• Journal of Electrical Engineering and Technology
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• v.8 no.1
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• pp.46-52
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• 2013

Economic properties of an integrated wind power plant (WPP) and the demand response (DR) programs in the sample electricity market are studied. Time of use (TOU) and direct load control (DLC) are two of the DR programs that are applied in the system. The influences of these methods and the incentive payments by market operator's (MOs) with variable elasticity are studied. It is observed that DR with TOU and DLC programs together yields better revenue and energy saving for MOs.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10a
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• pp.207-210
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• 1996

This paper describes the analysis of the operation of the switched snubber in order to depress the surge voltage in the MOS-FET inverter. In this paper, the N-channel MOS-FET which operates faster than the P-channel MOS-FET was used for the inverter circuit. So, the inverter and switched snubber can operate at high-frequency in the order of MHz. The cause of generating the surge voltage in the high frequency inverter has been cleared, and then how to depress the surge voltage using the switched snubber consisting of an N-channel MOS-FET has been given. Furthermore, described is the power loss within the switched snubber which is made of an N-channel MOS-FET. The inverter having the N-channel MOS-FET used as a switched snubber can drive such a low impedance load such as mega-sonic transducer for a mega-sonic studied cleaner sufficiently.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.105-106
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• 2005

The impact ionization MOS (I-MOS) transistor with 50nm channel length is presented by using 2-D device simulator ISE-TCAD. The subthreshold slope cannot be steeper than kT/q since the subthreshold conduction is due to diffusion current. As MOSFETs are scaled down, this problem becomes significant and the subthreshold slope degrades which leads an increase in the off-current and off-state power dissipation. The I-MOS is based on a gated p-i-n structure and the subthreshold conduction is induced by impact ionization. The simulation results show that the subthreshold slope is 11.7 mV/dec and this indicates the I-MOS improves the switching speed and off-state characteristics.

• Proceedings of the KIEE Conference
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• 2008.11a
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• pp.209-210
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• 2008

전력계통이 커지고 더욱 복잡해짐에 따라 전력계통을 안정적이고 경제적으로 운영하는데 EMS의 역할이 더욱 커지고 있다. EMS에서 계통상태를 정확하게 파악하는데 상태추정을 사용한다. 상태추정 결과는 다른 분석 프로그램에 대한 기초 자료가 되기 때문에 정확한 상태추정 결과를 얻는 것이 계통운영에 큰 영향을 미친다. 본 논문에서는 한국전력거래소에서 계통을 운영하는데 사용하는 EMS와 MOS 상태추정의 파라미터를 분석하고 의미를 파악하였으며 공통점을 파악하고 차이점을 비교하였다. 이를 바탕으로 앞으로의 개선방향을 제시하였다.

• KEPCO Journal on Electric Power and Energy
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• v.2 no.2
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• pp.223-225
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• 2016

The newly proposed analysis method using a direct-current current-voltage (DCIV) simulation is introduced for investigating leakage current composing MOS transistor. From comparing the density and location of traps using DCIV method and investigating the leakage current of gate channel transistor, we proposed the graphical analysis method to correlate the DCIV current and leakage mechanism by the traps. And, our graphical method intuitively explains that leakage current in MOS transistor is well correlated with the DCIV current of the MOS transistor arrays due to two kinds of traps created by Fowler-Nordheim (F-N) stress and Hot carrier stress, respectively.

• Journal of the Semiconductor & Display Technology
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• v.16 no.2
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• pp.49-54
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• 2017

In this paper, recent researches on new and renewable energy have been conducted due to problems such as energy exhaustion and environmental pollution, and new researches on high efficiency and high speed switching are needed. Therefore, we compared the efficiency by using high speed switching devices instead of IGBT which can't be used in high speed switching. The experiment was performed theoretically by applying the same parameters of the high speed switching devices which are the Cool MOS of Infineon Co., SiC C3M of Cree, and GaN FET device of Transform, by implementing the DC-DC boost converter and measuring the actual efficiency for output power and frequency. As a result, the GaN FET showed good efficiency at all switching frequency and output power.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.107-113
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• 2016

All circuits in power input can only use the power provided by an external power supply. General electronic circuits use a secondary supply generated by a converter using a primary power in the power input. But protection and detection circuit for over-voltage circuit or under-voltage in power input have to use that input power because there is no other supply in power input. Therefore, previous electronics for satellite can protect only over-voltage using a zener diode, and can't detect over-voltage and under-voltage events, and provide a detection capability for over-voltage and under-voltage only for secondary supply. The proposed circuit can detect over-voltage and under-voltage using a single supply for the primary power input, +28V, with the threshold characteristics for MOS-FET, and the accuracy for a detection circuit is increased by 2.5%.