• Clean Technology
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• v.29 no.1
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• pp.71-75
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• 2023

In general, the presence of non-selective intercrystalline (grain boundary) defects in polycrystalline metal-organic framework (MOF) or zeolite membranes, which are known to be ca. 1 nm in size, causes lower membrane performance (selectivity) than the intrinsically expected. In this study we show that applying a thin polymeric coating of polydimethylsiloxane (PDMS) on a polycrystalline MOF membrane is effective to cap the non-selective intercrystalline defects and therefore improve membrane performance. To demonstrate the concept, first, polycrystalline UiO-66, one of Zr-based MOFs, membranes were prepared by an in-situ solvothermal growth. By controlling membrane growth condition with respect to growth temperature, we were able to obtain polycrystalline UiO-66 membranes at 150 ℃ with intercrystalline defects of which the quantity is not significant, so it can be plugged by the suggested PDMS deposition. Second, their performances were compared before and after the PDMS deposition. As expected, the PDMS deposition ended up with a noticeable increase in CO₂/N₂ ideal selectivity from 6 to 14, indicating successful intercrystalline defect plugging. However, the enhancement in CO₂/N₂ selectivity was accompanied by a significant reduction in CO₂ permeance from 5700 to 33 GPU because the PDMS deposition not only plugs defects but also forms a continuous coating on membrane surface, adding an additional transport resistance.

• Journal of the Korean Vacuum Society
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• v.17 no.5
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• pp.461-465
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• 2008

The phase transformation in a film influences its surrounding. Effects of the precrystallization method, which removes influences on gate oxide caused by lateral crystallization, in metal-induced unilaterally crystallized polycrystalline silicon thin-film transistor devices and circuits were studied. Device by the method was shown to have a higher current drive, compared with conventional postcrystallized device. Moreover, we studied DC bias-induced changes in the performance of ring oscillator. PMOS inverters fabricated using precrystallized silicon films have very high dynamic and stable performance, compared with inverters fabricated using postcrystallized silicon films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.04b
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• pp.69-72
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• 2002

We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at $900^{\circ}C$. Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of $10mA/cm^{2}$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained.

• Transactions of Materials Processing
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• v.5 no.4
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• pp.297-304
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• 1996

A process model is formulated considering the effect of crystallographic texture developed in forming process. The deformation induced plastic anisotropy can be predicted by capturing the evolution of texture during large deformation in the polycrystalline aggregate. The anisotropic stiffness matrix for the aggregate is derived and implemented in Eulerian finite element code using a Consistent Penalty method. As an application the evolution of texture in rolling drawing and extrusion processes are simulated. The numerical results show good agreements with report-ed experimental textures.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.51.1-51.1
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• 2010

$Y_2O_3$ $Er_2O_3$ and $Nd_2O_3$ doped polycrystalline silicon nitride were prepared by hot pressed sintering at $1850^{\circ}C$ and their optical transmittance were investigated in visible and in infrared region. Mechanical and tribological properties were also investigated. Grain growth in silicon nitride was reduced with addition of $Y_2O_3$ and $Nd_2O_3$. 1 wt.% of each rare earth metal were sintered with 3 wt.% MgO, 9wt.% AlN and 87 wt.% of ${\alpha}-Si_3N_4$. Adding these rare earth metal oxides shows good mechanical properties as high strength and toughness and also shows low friction coefficient.

• Electrical & Electronic Materials
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• v.10 no.10
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• pp.1034-1040
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• 1997

A solar cell conversion effiency was degraded by grain boundary effect in polycrystalline silicon. Grain boundaries acted as potential barriers as well as recombination centers for the photo-generated carriers. To reduce these effects of the grain boundaries we investigated various influencing factors such as emitter thickness thermal treatment preferential chemical etching of grain boundaries grid design contact metal and top metallization along boundaries. Pretreatment in $N_2$atmosphere and gettering by POCl$_3$and Al were performed to obtain multicrystalline silicon of the reduced defect density. Structural electrical and optical properties of slar cells were characterized before and after each fabrication process. Improved conversion efficiencies of solar cell were obtained by a combination of pretreatment above 90$0^{\circ}C$ emitter layer of 0.43${\mu}{\textrm}{m}$ Al diffusion in to grain boundaries on rear side fine grid finger top Yb metal and buried contact metallization along grain boundaries.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.05a
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• pp.92-97
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• 2002

We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at $900 ^{\circ}C$. Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of $10mA/cm^2$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.315-318
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• 2004

We developed a vapor induced crystallization (VIC) process for the first time to obtain high quality polycrystalline Si films by sublimating the mixture of $AlCl_3$ and $NiCl_2$. The VIC process enhanced the crystallization of amorphous silicon thin films. The LPCVD amorphous silicon thin films were completely crystallized after 5 hours at 480 $^{\circ}C$. It is known that needle-like grains with very small width grow in the Ni-metal induced lateral crystallization. In our new method, the width of grains is larger because the grain can also grow perpendicular to the needle growth direction. Also the interface between the merging grain boundaries was coherent. As the results, a polycrystalline film with superior microstructure has been obtained.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1430-1432
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• 1997

A solar cell conversion effiency was degraded by grain boundary effect in polycrystalline silicon. To reduce these effects of the grain boundaries, we investigated various influencing factors such as preferential chemical etching of grain boundaries, grid design, transparent conductive thin film, and top metallization along grain boundaries. Pretreatment in $N_2$ atmosphere and gettering by $POCl_3$ and Al were performed to obtain polycrystalline silicon of the reduced defect density. Structural, electrical, and optical properties of solar cells were characterized. Improved conversion efficiencies of solar cell were obtained by a combination of Al diffusion into grain boundaries on rear side, fine grid finger, top Yb metal grid on Cr thin film of $200{\AA}$ and buried contact metallization along grain boundaries.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.717-720
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• 2007

We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.