• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.493-493
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• 2014

The manufacturing cost of thin-film photovoltics can potentially be lowered by minimizing the amount of a semiconductor material used to fabricate devices. Thin-film solar cells are typically only a few micrometers thick, whereas crystalline silicon (c-Si) wafer solar cells are $180{\sim}300\mu}m$ thick. As such, thin-film layers do not fully absorb incident light and their energy conversion efficiency is lower compared with that of c-Si wafer solar cells. Therefore, effective light trapping is required to realize commercially viable thin-film cells, particularly for indirect-band-gap semiconductors such as c-Si. An emerging method for light trapping in thin film solar cells is the use of metallic nanostructures that support surface plasmons. Plasmon-enhanced light absorption is shown to increase the cell photocurrent in many types of solar cells, specifically, in c-Si thin-film solar cells and in poly-Si thin film solar cell. By proper engineering of these structures, light can be concentrated and coupled into a thin semiconductor layer to increase light absorption. In many cases, silver (Ag) nanoparticles (NP) are formed either on the front surface or on the rear surface on the cells. In case of poly-Si thin film solar cells, Ag NPs are formed on the rear surface of the cells due to longer wavelengths are not perfectly absorbed in the active layer on the first path. In our cells, shorter wavelengths typically 300~500 nm are also not effectively absorbed. For this reason, a new concept of plasmonic nanostructure which is NPs formed both the front - and the rear - surface is worth testing. In this simulation Al NPs were located onto glass because Al has much lower parasitic absorption than other metal NPs. In case of Ag NP, it features parasitic absorption in the optical frequency range. On the other hand, Al NP, which is non-resonant metal NP, is characterized with a higher density of conduction electrons, resulting in highly negative dielectric permittivity. It makes them more suitable for the forward scattering configuration. In addition to this, Ag NP is located on the rear surface of the cell. Ag NPs showed good performance enhancement when they are located on the rear surface of our cells. In this simulation, Al NPs are located on glass and Ag NP is located on the rear Si surface. The structure for the simulation is shown in figure 1. Figure 2 shows FDTD-simulated absorption graphs of the proposed and reference structures. In the simulation, the front of the cell has Al NPs with 70 nm radius and 12.5% coverage; and the rear of the cell has Ag NPs with 157 nm in radius and 41.5% coverage. Such a structure shows better light absorption in 300~550 nm than that of the reference cell without any NPs and the structure with Ag NP on rear only. Therefore, it can be expected that enhanced light absorption of the structure with Al NP on front at 300~550 nm can contribute to the photocurrent enhancement.

• 한국재료학회지
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• 제17권2호
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• pp.73-80
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• 2007

For the sub-65 nm CMOS process, it is necessary to develop a new silicide material and an accompanying process that allows the silicide to maintain a low sheet resistance and to have an enhanced thermal stability, thus providing for a wider process window. In this study, we have evaluated the property and unit process compatibility of newly proposed composite silicides. We fabricated composite silicide layers on single crystal silicon from $10nm-Ni_{1-x}Co_x/single-crystalline-Si(100),\;10nm-Ni_{1-x}Co_x/poly-crystalline-\;Si(100)$ wafers (x=0.2, 0.5, and 0.8) with the purpose of mimicking the silicides on source and drain actives and gates. Both the film structures were prepared by thermal evaporation and silicidized by rapid thermal annealing (RTA) from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, surface composition, were investigated using a four-point probe, a field emission scanning probe microscope, a field ion beam, an X-ray diffractometer, and an Auger electron depth profi1ing spectroscopy, respectively. Finally, our newly proposed composite silicides had a stable resistance up to $1100^{\circ}C$ and maintained it below $20{\Omega}/Sg$., while the conventional NiSi was limited to $700^{\circ}C$. All our results imply that the composite silicide made from NiCo alloy films may be a possible candidate for 65 nm-CMOS devices.

• Advances in Energy Research
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• 제1권2호
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• pp.117-126
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• 2013

In this paper, core-shell semiconductor quantum dots (QDs) CdSeS/ZnS with emission at 490 nm and 450 nm were investigated for their use in luminescent down-shifting (LDS) layers. Luminescent quantum yield (LQY) of the QDs measurements in solution proposed that they were suitable candidates for inclusion in LDS layers. QDs were encapsulated in poly(methyl,methacrylate) (PMMA) polymer matrix and films were fabricated of $134{\pm}0.05$ microns. Selections of organic dyes from BASF Lumogen F range were also investigated for their use as LDS layers; Violet 570 and Yellow 083. The addition of LDS layers containing Violet 570 dye demonstrated a unity LQY when encapsulated within a PMMA matrix. A PV device of an LDS layer of Lumogen Violet 570 deposited on top of a crystalline silicon cell was fabricated where it was demonstrated to increase the efficiency of the cell by 34.5% relative.

• 대한금속재료학회지
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• 제46권3호
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• pp.159-168
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• 2008

Thermally-evaporated 10 nm-Ni/1 nm-Ru/(30 nm or 70 nm-poly)Si structures were fabricated in order to investigate the thermal stability of Ru-inserted nickel monosilicide. The silicide samples underwent rapid thermal anne aling at $300{\sim}1,100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process were formed on the top of the single crystal and polycrystalline silicon substrates mimicking actives and gates. The sheet resistance was measured using a four-point probe. High resolution X-ray diffraction and Auger depth profiling were used for phase and chemical composition analysis, respectively. Transmission electron microscope and scanning probe microscope(SPM) were used to determine the cross-sectional structure and surface roughness. The silicide, which formed on single crystal silicon and 30 nm polysilicon substrate, could defer the transformation of $Ni_2Si $i and $NiSi_2 $, and was stable at temperatures up to $1,100^{\circ}C$ and $1,100^{\circ}C$, respectively. Regarding microstructure, the nano-size NiSi preferred phase was observed on single crystalline Si substrate, and agglomerate phase was shown on 30 nm-thick polycrystalline Si substrate, respectively. The silicide, formed on 70 nm polysilicon substrate, showed high resistance at temperatures >$700^{\circ}C$ caused by mixed microstructure. Through SPM analysis, we confirmed that the surface roughness increased abruptly on single crystal Si substrate while not changed on polycrystalline substrate. The Ru-inserted nickel monosilicide could maintain a low resistance in wide temperature range and is considered suitable for the nano-thick silicide process.

• Korean Chemical Engineering Research
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• 제58권3호
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• pp.369-380
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• 2020

대부분의 단결정 실리콘 잉곳은 초크랄스키(Czochralski(Cz)) 공정으로 제조된다. 그러나 단결정 실리콘 잉곳을 제품화 및 태양 전지 기판으로 가공하였을 때 산소 불순물이 있는 경우 낮은 효율성을 나타내는 경향이 있다. 단결정 Si-잉곳의 생산을 위해서는 용융 Si를 녹인 다음 단결정 Si의 시드(Seed)로 결정화하는 초크랄스키(Cz) 공정을 도입한다. 용융된 다결정 Si-덩어리를 단결정 Si-잉곳으로 결정성장 될 때, 열 전달은 Cz-공정의 구조에서 중요한 역할을 한다. 본 연구에서 고품질 단결정 실리콘 잉곳을 얻기 위해 Cz-공정의 최적화된 설계를 구성하였다. 결정 성장 시뮬레이션로부터 결정성장을 위한 Pulling rate 및 Rotation speed에 최적의 변수값을 형성하기 위해 사용되었으며, 변형된 Cz-공정에 대한 연구 및 해당 결과가 논의되며 결정 성장 시뮬레이션을 사용하여 Cz-공정의 Pulling rate, Rotation speed 및 Melt charge level의 최적화된 설계로 인한 결정성장시 단결정 실리콘으로 유입되는 산소 농도 최소화를 설계하였다.

• 한국재료학회지
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• 제8권11호
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• pp.1067-1073
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• 1998

CO와 $H_2$의 탄소원을 사용한 마이크로파 플라즈마 화학기상증착 방법으로 SOD 구조에 적용될 양질의 다이아몬드 박막을 형성하였고, SOD 구조를 형성하기 위해 diamond/Si(100) 구조 위에 poly-Si 박막을 저압화학기상 증착법으로 제작하였다. CO/$H_2$탄소원의 유량비 증가에 따라 다이아몬드의 결정은 octahedron 구조에서 cubo-octahedron 구조로 바뀌었으며, 결정면은 {111}과 {100}으로 혼합되어 형성되었다. 비정질 carbon과 non-diamond성분이 없는 양질의 다이아몬드 박막은 CO/$H_2$의 유량비가 0.18일 때 형성되었으며, 주 결정상은 (111) 면이었다. diamond/Si(100) 계면은 void가 없는 평활한 계면을 이루었으며, 다이아몬드 박막의 유전상수, 누설전류와 비저항은 각각 $5.31\times10^{-9}A/cm^2$ 그리고 $9\times{10^7}{\Omega}cm$이었다.

• 자원리싸이클링
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• 제26권1호
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• pp.16-21
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• 2017

본 연구는 SiC 결정 성장을 위한 원료 분말 합성법에 관한 것이다. ${\beta}-SiC$ 분말들은 높은 온도 조건(>$1400^{\circ}C$)에서 실리콘 분말과 탄소 분말의 반응에 의해서 합성 된다. 이 반응은 진공 상태(또는 Ar 가스 분위기)에서 실리콘+탄소 혼합물이 반응하고 다결정의 SiC 분말을 형성하기 충분한 횟수를 거쳐 그라파이트 도가니 안에서 진행된다. 최종 결과물의 특성들은 X-ray 회절, SEM/EDS, 입도 분석 및 ICP-OES을 통해 분석되었다. 또한, 최종 결과물의 순도는 the Korean Standard KS L 1612에 의거해서 분석했다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 춘계학술대회 초록집
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• pp.81-81
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• 2010

유리기판위에 큰 결정입자를 갖는 실리콘 (폴리 실리콘) 박막을 제조하는 것은 가격저가화 및 대면적화 측면 같은 산업화의 높은 잠재성을 가지고 있기 때문에 그동안 많은 관심을 가지고 연구되어 오고 있다. 다양한 방법을 이용하여 다결정 실리콘 박막을 만들기 위해 노력해 오고 있으며, 태양전지에 응용하기 위하여 연속적이면서 10um이상의 큰 입자를 갖는 다결정 실리콘 씨앗층이 필요하며, 고속증착을 위해서는 (100)의 결정성장방향 등 다양한 조건이 제시될 수 있다. 다결정 실리콘 흡수층의 품질은 고품질의 다결정 실리콘 씨앗층에서 얻어질 수 있다. 이러한 다결정 실리콘의 에피막 성장을 위해서는 유리기판의 연화점이 저압 화학기상증착법 및 아크 플라즈마 등과 같은 고온기반의 공정 적용의 어려움이 있기 때문에 제약 사항으로 항상 문제가 제기되고 있다. 이러한 관점에서 볼때 유리기판위에 에피막을 성장시키는 방법으로 많지 않은 방법들이 사용될 수 있는데 전자 공명 화학기상증착법(ECR-CVD), 이온빔 증착법(IBAD), 레이저 결정화법(LC) 및 펄스 자석 스퍼터링법 등이 에피 실리콘 성장을 위해 제안되는 대표적인 방법으로 볼 수 있다. 이중에서 효율적인 관점에서 볼때 IBAD는 산업화측면에서 좀더 많은 이점을 가지고 있으나, 박막을 형성하는 과정에서 큰 에너지 및 이온크기의 빔 사이즈 등으로 인한 표면으로의 damages가 일어날 수 있어 쉽지 않는 방법이 될 수 있다. 여기에서는 이러한 damage를 획기적으로 줄이면서 저온에서 결정화 시킬 수 있는 cold annealing법을 소개하고자 한다. 이온빔에 비해서 전자빔의 에너지와 크기는 그리드 형태의 렌즈를 통해 전체면적에 조사하는 것을 쉽게 제어할 수 있으며 이러한 전자빔의 생성은 금속 필라멘트의 열전자가 아닌 Ar플라즈마에서 전자의 분리를 통해 발생된다. 유리기판위에 흡수층 제조연구를 위해 DC 및 RF 스퍼터링법을 이용한 비정질실리콘의 박막에 대하여 두께별에 따른 밴드갭, 캐리어농도 등의 변화에 대하여 조사한다. 최적의 조건에서 비정질 실리콘을 2um이하로 증착을 한 후, 전자빔 조사를 위해 1.4~3.2keV의 다양한 에너지세기 및 조사시간을 변수로 하여 실험진행을 한 후 단면의 이미지 및 결정화 정도에 대한 관찰을 위해 SEM과 TEM을 이용하고, 라만, XRD를 이용하여 결정화 정도를 조사한다. 또한 Hall효과 측정시스템을 이용하여 캐리어농도, 이동도 등을 각 변수별로 전기적 특성변화에 대하여 분석한다. 또한, 태양전지용 흡수층으로 응용을 위하여 dark전도도 및 photo전도도를 측정하여 광감도에 대한 결과가 포함된다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1261-1262
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• 2008

Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.