• 제목/요약/키워드: poly-Si TFT(poly-Si TFT s)

검색결과 116건 처리시간 0.038초

New Process Development for Hybrid Silicon Thin Film Transistor

  • Cho, Sung-Haeng;Choi, Yong-Mo;Jeong, Yu-Gwang;Kim, Hyung-Jun;Yang, Sung-Hoon;Song, Jun-Ho;Jeong, Chang-Oh;Kim, Shi-Yul
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
    • /
    • pp.205-207
    • /
    • 2008
  • The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

  • PDF

프리 패턴한 비정질 실리콘 박막의 two-step RTA 효과 (THE TWO-STEP RAPID THERMAL ANNEALING EFFECT OF THE PREPATTERNED A-SI FILMS)

  • 이민철;박기찬;최권영;한민구
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1998년도 하계학술대회 논문집 D
    • /
    • pp.1333-1336
    • /
    • 1998
  • Hydrogenated amorphous silicon(a-Si:H) films which were deposited by plasma enhanced chemical deposition(PECVD) have been recrystallized by the two-step rapid thermal annealing(RTA) employing the halogen lamp. The a-Si:H films evolve hydrogen explosively during the high temperature crystallzation step. In result, the recrystallized polycrystalline silicon(poly-Si) films have poor surface morphology. In order to avoid the hydrogen evolution, the films have undergone the dehydrogenation step prior to the crystallization step Before the RTA process, the active area of thin film transistors (TFT's) was patterned. The prepatterning of the a-Si:H active islands may reduce thermal damage to the glass substrate during the recrystallization. The computer generated simulation shows the heat propagation from the a-Si:H islands into the glass substrate. We have fabricated the poly-Si TFT's on the silicon wafers. The maximun ON/OFF current ratio of the device was over $10^5$.

  • PDF

High Performance Poly-Si TFT (${\mu}>290cm^2/Vsec$) Direct Fabricated on Plastic Substrate below $170^{\circ}C$

  • Kwon, Jang-Yeon;Kim, Do-Young;Jung, Ji-Sim;Kim, Jong-Man;Lim, Hyuck;Park, Kyung-Bae;Cho, Hans-S;Zhang, Xiaoxin;Yin, Huaxiang;Xianyu, Wenxu;Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
    • /
    • pp.149-152
    • /
    • 2005
  • We present the characterization of poly-Si TFT fabricated below on Plastic Substrate below $170^{\circ}C$ on plastic substrate using excimer laser crystallization of Xe sputtered Si films. Gate insulator with a breakdown field exceeding 8 MV/cm was deposited by using inductively coupled plasma CVD. Finally, we successfully fabricate TFT with a electron field-effect mobility value greater than $290\;cm^2/Vsec$.

  • PDF

Fabrication of excimer laser annealed poly-si thin film transistor by using an elevated temperature ion shower doping

  • Park, Seung-Chul;Jeon, Duk-Young
    • E2M - 전기 전자와 첨단 소재
    • /
    • 제11권11호
    • /
    • pp.22-27
    • /
    • 1998
  • We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

  • PDF

Laser crystallization of Si film for poly-Si thin film transistor on plastic substrates

  • Kwon, Jang-Yeon;Cho, Hans-S;Kim, Do-Young;Park, Kyung-Bae;Jung, Ji-Sim;Park, Young-Soo;Lee, Min-Chul;Han, Min-Koo;Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
    • /
    • pp.957-961
    • /
    • 2004
  • In order to realize high performance thin film transistor (TFT) on plastic substrate, Si film was deposited on plastic substrate at 170$^{\circ}C$ by using inductivity coupled plasma chemical vapor deposition (ICPCVD). Hydrogen concentration in as-deposited Si film was 3.8% which is much lower than that in film prepared by using conventional plasma enhanced chemical vapor deposition (PECVD). Si film was deposited as micro crystalline phase rather than amorphous phase even at 170$^{\circ}C$ because of high density plasma. By step-by-step Excimer laser annealing, dehydrogenation and recrystallization of Si film were carried out simultaneously. With step-by-step annealing and optimization of underlayer structure, it has succeeded to achieve large grain size of 300nm by using ICPCVD. Base on these results, poly-Si TFT was fabricated on plastic substrate successfully, and it is sufficient to drive pixels of OLEDs, as well as LCDs.

  • PDF

새로운 게이트 절연막 구조를 가지는 다결정 실리콘 박막 트랜지스터 (Characteristics of the Novel Gate Insulator Structured Poly-Si TFT's)

  • 황한욱;최용원;김용상;김한수
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1999년도 하계학술대회 논문집 D
    • /
    • pp.1965-1967
    • /
    • 1999
  • We have investigated the electrical characteristics of the poly-Si TFT's with the novel gate insulator structure. The gate insulator makes the offset region to reduce leakage current, and the electrical characteristics are obtained by employing Virtual Wafer Fab. simulator. As increases the gate insulator thickness above the offset region of this structure from $0{\AA}$ to $2000{\AA}$, the OFF state current at $V_G$=10V decrease by two orders in magnitude while ON state current doesn't decrease significantly. ON/OFF current ratios for conventional device and the proposed device with $2000{\AA}$ gate insulator thickness are $1.68{\times}10^5$ and $1.07{\times}10^7$, respectively.

  • PDF

NH3 Plasma Treatment를 사용한 고성능 TFT 제작 및 분석 (A Production and Analysis on High Quality of Thin Film Transistors Using NH3 Plasma Treatment)

  • 박희준;;이준신
    • 한국전기전자재료학회논문지
    • /
    • 제30권8호
    • /
    • pp.479-483
    • /
    • 2017
  • The effect of $NH_3$ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of $NH_3$ plasma treated and MIS was $2.7{\times}10^{10}cm^{-2}eV^{-1}$. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in $26cm^2V^{-1}S^{-1}$ of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage's shift value of $NH_3$ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and $NH_3$ plasma treatment was considered effective for passivation.

고분자 기판위에 Poly-Si TFT 제작시 Mis-align방지를 위한 연구 (A Study on the Mis-align during Fabricated Poly-Si TFT on Polymer substrate)

  • 강수희;황정연;서대식;김영훈;문대규;한정인
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2005년도 춘계학술대회 논문집 디스플레이 광소자 분야
    • /
    • pp.173-176
    • /
    • 2005
  • Teijin사의 HT100-B60의 폴리카보네이트(polycarbonate) $100{\mu}m$, I-Component사의 PES(polyethersulfone) $200{\mu}m$, Ferrania사의 PAR(polyacrylate) $100{\mu}m$$200{\mu}m$를 사용하였다 열팽창계수의 차이로 인해 공정상 기판의 가열과 냉각시 열응력이 발생하여 기판의 크랙발생의 원인이 된다. 이를 최소화하기 위해 모든 공정이 시작하기 전에 pre-annealing을 통해 plastic 기판의 시간별 공정을 실시하였다. plastic film의 annealing time은 0h, 12h, 24, 40h, 50h, 60h, 70h, 80h으로 사간을 달리하여 오븐 안의 진공상태를 조성하여 실험하였다. Thermal evaporator로 Al을 약 170nm 증착하였으며 (주)동진 세미캠의 DTFR-1011s DR LCD용 감광액을 Spin Coating Spread(500rpm/6sec), Spin(3000rpm/20sec)으로 coating하였다.

  • PDF