• 한국방사선학회논문지
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• 제15권5호
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• pp.749-754
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• 2021

적은 수의 광센서를 사용한 PET 검출기의 섬광 픽셀과 광센서의 매칭 비율을 최대화하기 위해 다양한 섬광 픽셀의 배열과 4개의 광센서를 사용하였다. 섬광 픽셀의 배열은 6 × 6에서부터 11 × 11까지 여섯 케이스로 구성하였다. 광센서간의 간격은 모든 섬광 픽셀에서 동일하게 적용하였으며, 섬광 픽셀의 크기를 줄여 배열을 확장하였다. 설계한 PET 검출기들의 평면 영상 획득을 위해 빛 시뮬레이션이 가능한 DETECT 2000을 사용하였다. 각 섬광 픽셀 배열의 중심에서 소멸방사선과 섬광 픽셀의 상호작용을 통해 생성된 빛을 발생시켜, 4개의 광센서를 통해 빛을 검출한 후 평면 영상을 재구성하였다. 재구성한 평면 영상을 통해 모든 섬광 픽셀들이 구분이 가능한 최대의 배열을 찾았다. 그 결과 8 × 8 섬광 픽셀 배열의 평면 영상에서 모든 섬광 픽셀들이 구분이 가능하였으며, 9 × 9 섬광 픽셀 평면 영상에서부터는 가장자리 두 섬광 픽셀들이 서로 겹쳐 영상에 나타났다. 이때의 섬광 픽셀과 광센서의 매칭 비율은 16:1이었다. 본 검출기를 사용하여 PET 시스템을 구성할 경우, 사용하는 광센서의 수가 감소되고 이에 따른 신호처리 회로의 간소화를 통해 전체 시스템의 비용을 감소시킬 것으로 기대된다.

• 센서학회지
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• 제19권2호
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• pp.130-136
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• 2010

The microbolometer array sensor with fine pitch pixel array has been implemented to the released amorphous silicon layer supported by two contact pads. For the design of focal plane mirror with geometrical flatness, the simple beam test structures were fabricated and characterized. As the beam length decreased, the effect of beam width on the bending was minimized, Mirror deformation of focal plane in a real pixel showed downward curvature by residual stress of a-Si and Ti layer. The mirror tilting was caused by the mis-align effect of contact pad and confirmed by FEA simulation results. The properties of bolometer have been measured as such that the NETD 145 mK, the TCR -2 %/K, and thermal time constant 1.99 ms.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.99-102
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• 1999

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking. To improve these problems which are caused by the fried-through voltage, we have evaluated new driving methods to reduce the fled-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. And two-gate line driving methods with the optimized gate signals were applied for the cst-on-gate structure pixels. These gate driving methods were better feed-through characteristics than conventional simple gate pulse. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.320-323
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• 2000

In the resent years, the Thin Film Transistor Liquid Crystal Display(TFT-LCD) have trend toward larger panel sizes and higher spatial and/or gray-scale resolution. In this trend, Because of its low field effect mobility, a-Si TFT is change to poly-Si TFT. In this paper, both effective-medium model of poly-Si TFTs and empirical capacitance model are applied to Pixel Design Array Simulation Tool (PDAST) and the pixel characteristics of TFT-LCD array were simulated, which were compared with the results calculated by Aim-Spice.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2003년도 춘계종합학술대회
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• pp.249-252
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• 2003

본 논문에서는 반도체 방식의 직접 터치식 capacitive type 지문인식센서의 신호처리를 위한 회로를 제안하였다. 센서로부터의 capacitance의 변화를 전압의 신호로 전환하기 위해서 charge-sharing 방식의 회로를 적용하였다. 지문센서 감도저하의 가장 큰 원인인 sensor plate에 존재하는 parasitic capacitance를 제거하여 ridge와 valley 사이의 전압차를 향상시키기 위하여 기존과는 다른 아날로그 버퍼회로를 설계 적용하였다. 센서 하부회로와의 isolation 대책을 통하여 ESD 및 노이즈방지를 위한 설계를 실시하였다. 제안된 신호처리회로는 128$\times$144 pixel 규모의 회로로 구현되었다. 본 설계회로는 향후 생체인식을 이용한 정보보호용 지문인식 시스템에 응용될 수 있으리라 본다.

• 센서학회지
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• 제25권5호
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• pp.349-353
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• 2016

Recently, research on bolometer-type uncooled infrared image sensor which is made for industrial applications has been increasing. In general, it is difficult to calibrate fixed pattern noise (FPN) of bolometer array. In this paper, average-current calibration algorithm is presented for reducing bolometer resistance offset. A resistor which is produced by standard CMOS process, on the average, has a deviation. We compensate for deviation of each resistor using average-current calibration algorithm. The proposed algorithm has been implemented by a chip which is consisted of a bolometer pixel array, average current generators, current-to-voltage converters (IVCs), a digital-to-analog converter (DAC), and analog-to-digital converters (ADCs). These bolometer-resistor array and readout circuit were designed and manufactured by $0.35{\mu}m$ standard CMOS process.

• 센서학회지
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• 제31권6호
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• pp.366-370
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• 2022

A 12 ㎛ pixel-sized 360 × 240 microbolometer focal plane array (MBFPA) was fabricated using a complementary metaloxide-semiconductor (CMOS)-compatible process. To release the MBFPA membrane, an amorphous carbon layer (ACL) processed at a low temperature (<400 ℃) was deposited as a sacrificial layer. The thermal time constant of the MBFPA was improved by using serpentine legs and controlling the thickness of the SiNx layers at 110, 130, and 150 nm on the membrane, with response times of 6.13, 6.28, and 7.48 msec, respectively. Boron-doped amorphous Si (a-Si), which exhibits a high-temperature coefficient of resistance (TCR) and CMOS compatibility, was deposited on top of the membrane as an IR absorption layer to provide heat energy transformation. The structural stability of the thin SiNx membrane and serpentine legs was observed using field-emission scanning electron microscopy (FE-SEM). The fabrication yield was evaluated by measuring the resistance of a representative pixel in the array, which was in the range of 0.8-1.2 Mohm (as designed). The yields for SiNx thicknesses of SiNx at 110, 130, and 150 nm were 75, 86, and 86%, respectively.

• Journal of the Korean Physical Society
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• 제73권12호
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• pp.1904-1907
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• 2018

We designed a depth-encoding positron emission tomography (PET) detector by using a bottom and side readout method with a cross-arranged scintillator array. To evaluate the characteristics of the novel detector module, we used the DETECT2000 simulation tool to perform the optical photon transport in the crystal array. The detector module consists of an $M(column){\times}N(row)$ cross-arranged crystal array composed of M/3 sub-arrays consisting of $N{\times}3$ crystals. The second column of the sub-array is arranged perpendicular to the first and the third columns. The crystal is optically coupled to the crystals of the other columns; however, the surfaces between the crystals in the same column are treated as reflectors. A $6{\times}5$ crystal array consisting of two sub-arrays was considered for proof of concept. The two multi-pixel photon counter (MPPC) arrays are coupled to the bottom and one side of the crystal array, respectively. The x-y position is determined by the bottom MPPC array, and the side MPPC array gives depth information. All pixels in the x-y plane and the z direction were clearly distinguished.

• 센서학회지
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• 제23권2호
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• pp.87-93
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• 2014

In this paper, we propose a block-based low-power complementary metal oxide semiconductor (CMOS) image sensor (CIS) with a simple pixel structure for power efficiency. This method, which uses an additional computation circuit, makes it possible to reduce the power consumption of the pixel array. In addition, the computation circuit for a block-based CIS is very flexible for various types of pixel structures. The proposed CIS was designed and fabricated using a standard CMOS 0.18 ${\mu}m$ process, and the performance of the fabricated chip was evaluated. From a resultant image, the proposed block-based CIS can calculate a differing contrast in the block and control the operating voltage of the unit blocks. Finally, we confirmed that the power consumption in the proposed CIS with a simple pixel structure can be reduced.

• Progress in Superconductivity
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• 제14권2호
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• pp.99-101
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• 2012

Fluorescent yield X-ray absorption fine structure (XAFS) spectroscopy is useful for analyzing local structure of specific elements in matrices. We developed an XAFS apparatus with a 100-pixel superconducting tunnel junction (STJ) detector array with a high sensitivity and a high resolution for light-element dopants in wide-gap semiconductors. An STJ detector has a pixel size of $100{\mu}m$ square, and an asymmetric layer structure of Nb(300 nm)-Al(70 nm)/AlOx/Al(70 nm)-Nb(50 nm). The 100-pixel STJ array has an effective area of $1mm^2$. The XAFS apparatus with the STJ array detector was installed in BL-11A of High Energy Accelerator Research Organization, Photon Factory (KEK PF). Fluorescent X-ray spectrum for boron nitride showed that the average energy resolution of the 100-pixels is 12 eV in full width half maximum for the N-K line, and The C-K and N-K lines are separated without peak tail overlap. We analyzed the N dopant atoms implanted into 4H-SiC substrates at a dose of 300 ppm in a 200 nm-thick surface layer. From a comparison between measured X-ray Absorption Near Edge Structure (XANES) spectra and ab initio FEFF calculations, it has been revealed that the N atoms substitute for the C site of the SiC lattice.