• 제목/요약/키워드: pixel array

검색결과 262건 처리시간 0.026초

대면적 고화질의 TFT-LCD 화소 설계 최적화 및 어레이 시뮬레이션 특성 (Array Simulation Characteristics and TFT-LCD Pixel Design Optimization for Large Size, High Quality Display)

  • 이영삼;윤영준;정순신;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 추계학술대회 논문집
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    • pp.137-140
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    • 1998
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate si후미 distortion and pixel charging capability. which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio and level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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화소 설계 어레이 시뮬레이터 (PDAST)를 이용한 대면적 고화질을 위한 TFT-LCD의 화소설계 (YFY-LCD Pixel Design for Large Size, High Quality using PDAST(Pixel Design Array Simulator))

  • 이영삼;윤영준;정순신;최종선
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 D
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    • pp.1364-1366
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    • 1998
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay. pixel charging ratio, level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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게이트 라인 물질의 저항률이 TFT-LCD 화소의 동작에 미치는 영향 (Effects of Resistivity of Gate Line Material on TFT-LCD Pixel Operations)

  • 이영삼;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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    • pp.321-324
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    • 1998
  • Pixel-Design Array Simulation Tool(PDAST) was used to profoundly the gate signal distortion and pixel changing capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio, level-shift of the pixel voltage were simulated with varying the resis5tivity of the gate line material. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Covered Microlens Structure for Quad Color Filter Array of CMOS Image Sensor

  • Jae-Hyeok Hwang;Yunkyung Kim
    • Current Optics and Photonics
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    • 제7권5호
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    • pp.485-495
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    • 2023
  • The pixel size in high-resolution complementary metal-oxide-semiconductor (CMOS) image sensors continues to shrink due to chip size limitations. However, the pixel pitch's miniaturization causes deterioration of optical performance. As one solution, a quad color filter (CF) array with pixel binning has been developed to enhance sensitivity. For high sensitivity, the microlens structure also needs to be optimized as the CF arrays change. In this paper, the covered microlens, which consist of four microlenses covered by one large microlens, are proposed for the quad CF array in the backside illumination pixel structure. To evaluate the optical performance, the suggested microlens structure was simulated from 0.5 ㎛ to 1.0 ㎛ pixels at the center and edge of the sensors. Moreover, all pixel structures were compared with and without in-pixel deep trench isolation (DTI), which works to distribute incident light uniformly into each photodiode. The suggested structure was evaluated with an optical simulation using the finite-difference time-domain method for numerical analysis of the optical characteristics. Compared to the conventional microlens, the suggested microlens show 29.1% and 33.9% maximum enhancement of sensitivity at the center and edge of the sensor, respectively. Therefore, the covered microlens demonstrated the highly sensitive image sensor with a quad CF array.

새로운 정전용량 계산식물 이용한 대면적 .고화질 TFT-LCD의 화소 특성 시뮬레이션 (Simulations of Pixel Characteristics for Large Size and High Qualify TFT-LCD using a new sophisticated Capacitance Formulas)

  • 윤영준;정순신;김태형;박재우;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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    • pp.613-616
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    • 1999
  • An active-matrix LCD using thin film transistors (TFTs)has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed, The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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A One-Kilobit PQR-CMOS Smart Pixel Array

  • Lim, Kwon-Seob;Kim, Jung-Yeon;Kim, Sang-Kyeom;Park, Byeong-Hoon;Kwon, O'Dae
    • ETRI Journal
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    • 제26권1호
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    • pp.1-6
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    • 2004
  • The photonic quantum ring (PQR) laser is a three dimensional whispering gallery (WG) mode laser and has anomalous quantum wire properties, such as microampere to nanoampere range threshold currents and ${\sqrt{T}}$-dependent thermal red shifts. We observed uniform bottom emissions from a 1-kb smart pixel chip of a $32{\times}32$ InGaAs PQR laser array flip-chip bonded to a 0.35 ${\mu}m$ CMOS-based PQR laser driver. The PQR-CMOS smart pixel array, now operating at 30 MHz, will be improved to the GHz frequency range through device and circuit optimization.

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Array Testing of TFT-LCD Panel with Integrated Gate Driver Circuits

  • Lee, Jonghwan
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.68-72
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    • 2020
  • A new method for array testing of TFT-CD panel with the integrated gate driver circuits is presented. As larger size/high resolution TFT-LCD with the peripheral driver circuits has emerged, one of the important problems for manufacturing is array testing on the panel. This paper describes the technology of detecting defective arrays and optimizing the array testing process. For the effective characterization of pixel array, the pixel storage capability is simulated and measured with voltage imaging system. This technology permits full functional testing during the manufacturing process, enabling fabrication of large TFT-LCD panels with the integrated driver circuits.

광센서 크기에 따른 섬광 픽셀 배열의 최대화 연구 (A Study on the Maximization of Scintillation Pixel Array According to the Size of the Photosensor)

  • 이승재
    • 한국방사선학회논문지
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    • 제16권2호
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    • pp.157-162
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    • 2022
  • 전임상용 양전자방출단층촬영기기는 인체에 비해 매우 작은 소동물을 대상으로 촬영이 이루어지므로, 우수한 공간분해능을 지닌 검출기가 필요하다. 이를 위해 작은 섬광 픽셀을 사용한 검출기를 사용하여 시스템을 구성하였다. 현재 개발되어 사용되는 광센서의 크기는 한정되어 있으므로, 이에 맞는 최소한의 섬광 픽셀과 최대의 배열로 구성할 경우 우수한 공간분해능을 얻을 수 있다. 본 연구에서는 광센서의 크기를 고정하고, 이에 맞는 다양한 섬광 픽셀의 배열을 구성하여 평면 영상에서 겹침이 발생하지 않고, 모든 섬광 픽셀들이 구분이 되는 최대의 섬광 픽셀 배열을 찾고자 한다. 이를 위해 섬광체와 광센서로 이루어진 검출기 모듈의 시뮬레이션이 가능한 DETECT2000을 사용하였다. 3 mm × 3 mm 픽셀이 4 × 4 배열로 이루어진 광센서를 사용하였으며, 섬광 픽셀 배열은 8 × 8에서부터 13 × 13까지 구성하여 시뮬레이션을 수행하였다. 광센서 픽셀에서 획득된 데이터를 통해 평면 영상을 구성하였으며, 평면 영상과 프로파일을 통해 영상의 겹침이 발생하지 않는 최대의 섬광 픽셀 배열을 찾았다. 그 결과 평면 영상에서 서로 겹침이 발생하지 않고 모든 섬광 픽셀들이 영상화되는 섬광 픽셀 배열의 크기는 11 × 11이었다.

광가이드를 사용한 최대 섬광 픽셀 배열의 영상 획득 연구 (Image Acquisition Study of Maximal Scintillation Pixel Array using Light Guide)

  • 이승재
    • 한국방사선학회논문지
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    • 제16권3호
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    • pp.249-255
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    • 2022
  • 소동물용 양전자방출단층촬영기기는 매우 작은 장기를 영상화하기 위해 매우 높은 공간분해능을 지닌다. 우수한 공간분해능을 획득하기 위해서는 매우 작은 섬광 픽셀을 사용하여 시스템을 구성해야 한다. 매우 작은 섬광 픽셀을 사용하여 검출기를 구성할 경우 광센서 픽셀에 따라 적용가능한 배열의 크기가 달라진다. 이전 연구에서 광센서 크기에 따른 최대의 섬광 픽셀 배열을 찾는 연구를 수행하였다. 본 연구에서는 더 확장된 섬광 픽셀 배열을 사용하여 검출기를 구성하기 위해 광가이드를 적용한 검출기를 설계하여 모든 섬광 픽셀들이 영상화되는 최대의 배열을 찾고자 한다. 섬광체로 이루어진 검출기의 시뮬레이션이 가능한 DETECT2000을 사용하여 검출기를 설계하였다. 11 × 11 섬광 픽셀 배열에서부터 16 × 16 배열까지 검출기를 구성하여 시뮬레이션을 수행하였다. 섬광 픽셀에서 발생된 빛을 광센서로 수집하여 평면 영상을 획득한 후 영상의 분석을 통해 겹침이 발생하지 않는 최대의 배열을 찾았다. 그 결과 겹침이 발생하지 않고 모든 섬광 픽셀들이 구분 가능한 최대의 배열은 15 × 15 배열이었다.

대면적 고화질 TFT-LCD용 게이트 Driving에 관한 Simulation (Simulations of Gate Driving Schemes for Large Size, High Quality TFT-LCD)

  • 정순신;윤영준;김태형;최종선
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 D
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    • pp.1809-1811
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    • 1999
  • In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate delay, feed-through voltage and image sticking. Gate delay is one of the biggest limiting factors for large-screen-size, high-resolution thin-film transistor liquid crystal display (TFT/LCD) design. Many driving method proposed for TFT/LCD progress. Thus we developed gate driving signal generator. Since Pixel-Design Array Simulation Tool (PDAST) can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the driving signals of gate lines on the pixel operations can be effectively analyzed.

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