• 대한금속재료학회지
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• 제48권11호
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• pp.1028-1034
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• 2010

In the development of 3D package, through silicon via (TSV) formation technology by using deep reactive ion etching (DRIE) is one of the key processes. We performed the Bosch process, which consists of sequentially alternating the etch and passivation steps using $SF_6$ with $O_2$ and $C_4F_8$ plasma, respectively. We investigated the effect of changing variables on vias: the gas flow time, the ratio of $O_2$ gas, source and bias power, and process time. Each parameter plays a critical role in obtaining a specified via profile. Analysis of via profiles shows that the gas flow time is the most critical process parameter. A high source power accelerated more etchant species fluorine ions toward the silicon wafer and improved their directionality. With $O_2$ gas addition, there is an optimized condition to form the desired vertical interconnection. Overall, the etching rate decreased when the process time was longer.

• 한국재료학회지
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• 제31권12호
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• pp.727-731
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• 2021

In this study, we have investigated a selective emitter using a UV laser on BBr₃ diffusion doping layer. The selective emitter has two regions of high and low doping concentration alternatively and this structure can remove the disadvantages of homogeneous emitter doping. The selective emitters were fabricated by using UV laser of 355 nm on the homogeneous emitters which were formed on n-type Si by BBr₃ diffusion in the furnace and the heavy boron doping regions were formed on the laser regions. In the optimized laser doping process, we are able to achieve a highly concentrated emitter with a surface resistance of up to 43 Ω/□ from 105 ± 6 Ω/□ borosilicate glass (BSG) layer on Si. In order to compare the characteristics and confirm the passivation effect, the annealing is performed after Al₂O₃ deposition using an ALD. After the annealing, the selective emitter shows a better effect than the high concentration doped emitter and a level equivalent to that of the low concentration doped emitter.

• 한국산학기술학회논문지
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• 제21권2호
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• pp.619-626
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• 2020

환경 보호까지 고려한 Non-amine계 부식 방지제를 포함하는 새로운 부동액 개발이 주요한 이슈가 되고 있다. 본 연구에서는 Non-amine계 부식 방지제 4종을 합성하고 이를 이용하여 새로운 자동차용 부동액 5종을 제조하여 무게 변화량, 표면 관찰, 거칠기 측정, 용액 중 구리 용출량 측정을 통해 구리의 부식 속도를 평가하였다. 평가 결과 부동액 5종중에서 Sample 4가 유도결합 플라즈마 광도계로 측정하였을 때 구리의 용출량이 적고 용출 속도가 매우 느렸다. Sample 4는 시험 후 금속 표면이 매끄러운 편이나 표면에 작은 국부 부식이 관찰됨에 따라 표면에 부식 생성물 층을 고르게 형성한 것으로 보여 구리의 부동태화에 따른 부식 억제 효과가 있으므로 가장 양호한 부식방지 성능을 보였다. Sample 4에 첨가된 주요 부식방지제는 1-Aminomethyl(N',N'-di(2-hydroxyethyl) benzotrazole로, 이 부식 억제 성분은 국부부식은 상대적으로 높으나 부동태화가 진행된 Sample 5에도 일정 함량 포함되었다. 따라서 본 연구에서 사용한 4종의 부식 방지제 중 1-Aminomethyl(N',N'-di(2-hydroxyethyl)benzotrazole이 가장 부식 억제 효과가 높았다. 이는 상기의 부식 방지제가 부동액상에서 구리의 부동태화를 촉진함으로써 부식을 방지하는 것으로 판단된다.

• 한국전기전자재료학회논문지
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• 제26권1호
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• pp.73-79
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• 2013

Crystalline silicon solar cells with $SiN_x/SiN_x$ and $SiN_x/SiO_x$ double layer anti-reflection coatings(ARC) were studied in this paper. Optimizing passivation effect and optical properties of $SiN_x$ and $SiO_x$ layer deposited by PECVD was performed prior to double layer application. When the refractive index (n) of silicon nitride was varied in range of 1.9~2.3, silicon wafer deposited with silicon nitride layer of 80 nm thickness and n= 2.2 showed the effective lifetime of $1,370{\mu}m$. Silicon nitride with n= 1.9 had the smallest extinction coefficient among these conditions. Silicon oxide layer with 110 nm thickness and n= 1.46 showed the extinction coefficient spectrum near to zero in the 300~1,100 nm region, similar to silicon nitride with n= 1.9. Thus silicon nitride with n= 1.9 and silicon oxide with n= 1.46 would be proper as the upper ARC layer with low extinction coefficient, and silicon nitride with n=2.2 as the lower layer with good passivation effect. As a result, the double layer AR coated silicon wafer showed lower surface reflection and so more light absorption, compared with $SiN_x$ single layer. With the completed solar cell with $SiN_x/SiN_x$ of n= 2.2/1.9 and $SiN_x/SiO_x$ of n= 2.2/1.46, the electrical characteristics was improved as ${\Delta}V_{oc}$= 3.7 mV, ${\Delta}_{sc}=0.11mA/cm^2$ and ${\Delta}V_{oc}$=5.2 mV, ${\Delta}J_{sc}=0.23mA/cm^2$, respectively. It led to the efficiency improvement as 0.1% and 0.23%.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1341-1342
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• 2006

Electrical characteristics of field-effect thin film transistors (TFTs) with p-channels of CdTe/CdHgTe core-shell nanocrystals are investigated in this paper. For the fabrication of bottom- and top-gate TFTs, CdTe/CrHgTe nanocrystals synthesized by colloidal method are first dispersed on oxidized p+ Si substrates by spin-coating, the dispersed nanoparticles are sintered at $150^{\circ}C$ to form the channels for the TFTs, and $Al_{2}O_{3}$ layers are deposited on the channels. A representative bottom-gate field-effect TFT with a bottom-gate $SiO_2$ layer exhibits a mobility of $0.21cm^2$/ Vs and an Ion/Ioff ratio of $1.5{\times}10^2$ and a representative top-gate field-effect TFT with a top-gate $Al_{2}O_{3}$ layer provides a field-effect mobility of $0.026cm^2$/ Vs and an Ion/Ioff ratio of $2.5{\times}10^2$. $Al_{2}O_{3}$ was deposited for passivation of CdTe/CdHgTe core-shell nanocrystal layer, resulting in enhanced hole mobility, Ior/Ioff ratio by 0.25, $3{\times}10^3$, respectively. The CdTe/CdHgTe nanocrystal-based TFTs with bottom- and top gate geometries are compared in this paper.

• Journal of Advanced Marine Engineering and Technology
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• 제21권5호
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• pp.535-541
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• 1997

The effect of concentration of each solution( HCI, $H_2SO_4$ and $HNO_3$), scan rate and polished surface condition on the corrosion of AISI 304 Stainless Steel were investigated, utilizing the Method ASTM G5 - 87. It can be concluded that: 1) For the same concentration(i.e. 1N) of each solution the corrosion rate is the highest in HCI and lowest in $HNO_3$. Also, the difference of values of $i_{cirt}$ generated for each solution is significant. 2) As the concentration of the solution $H_2SO_4$ is increased (O.5N, 1N, 2N) the values of $E_{cor}$ $i_{crit}$ and $i_{p}$ are increased. 3) In case of existence of SCN ion of O.OlN, the values of iCTIt and ip generated are approximately 100 times and 1.4 times higher respectively, than in the case of non - existence of $SCN^{-}$. However the existence of $SCN^{-}$ doesn't affect the value of $E_{cor}$ and $E_{p}$. 4) The values of $i_{crit}$ and $i_{p}$ are increased due to the increase of scan rate. But the values of $E_{cor}$ and $E_{p}$ do not depend on the scan rate. 5) The $i_{p}$ value depends greatly on oxygen in the solution, but the changes in values of $E_{cor}$ $i_{crit}$ and $E_{b}$ due to the oxygen are insignificant. 6) If a component is polished using #400, #600 and #800 wet polish paper, the effect of surface condition on variations of values of $i_{crit}$ and $i_{p}$ is slightly significant.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 디스플레이 광소자분야
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• pp.177-180
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• 2004

In this study, we report a novel encapsulation method for longevity of an organic thin-film transistor (OTFT) using pentaceneby means of an adhesive multiplayerincluded Al film. For encapsulation of OTFTs, the Al film adhered onto the OTFT in a dry nitrogen atmosphere using a proper adhesive. A lifetime, which was defined as the time necessary to reduce mobility to 2% of initial mobility value, was observed from the typical $I_{D-VD}$ characteristics of the field-effect transistor (FET). The initial field effect mobility ${\mu}$ was measured to be $2.0{\times}10^{-1}\;cm^2/Vs$. The characterization was maintained for long times in air. No substantial degeneration occurred. The performance and the stability are probably due to the encapsulation effect.

• 수산해양기술연구
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• 제36권2호
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• pp.139-146
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• 2000

Cavitation can occur in pipes when liquid is moving at high velocity, especially at pittings where the smooth bore of the pipe is interrupted. The effect is usually to produce pitting on the downstream side of the turbulence. However, stress corrosion cracking behavior under cavitation erosion-corrosion was neatly unknown. In this study, therefore, some were investigated of stress corrosion cracking behavior, others were stress corrosion cracking behavior under cavitation erosion-corrosion of water injection. And datas obtained as the results of experiment were compared between the two. Mainresult obtained are as follows: 1) Stress corrosion cracking growth rate of heat affected zone under cavitation erosion-corrosion becomes most rapid, and stress intensity factor $K_1$becomes most high. 2) Stress corrosion cracking growth mechanism by cavitation erosion-corrosion is judgement on the strength of the film rupture model and the tunnel model. 3) The range of potential as passivation of heat affected zone is less noble than that of base metal, and that value is smaller. 4) Corrosion potential under cavitation erosion-corrosion in loaded stress is less noble than that of stress corrosion, and corrosion current density is higher.

• 한국재료학회지
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• 제28권10호
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• pp.544-550
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• 2018

The passivation of AZ91D Mg alloys by plasma anodization requires deliberate choice of process parameters due to the presence of large amounts of structural defects. We study the dependence of pore formation, surface roughness and corrosion resistance on voltage by comparing the direct current (DC) mode and the pulse wave (pulse) mode in which anodization is performed. In the DC plasma anodization mode, the thickness of the electrolytic oxide film of the AZ91D alloy is uneven. In the pulse mode, the thickness is relatively uniform and the formed thin film has a three-layer structure. The pulse mode creates less roughness, uniform thickness and improved corrosion resistance. Thus, the change of power mode from DC to pulse at 150 V decreases the surface roughness (Ra) from $0.9{\mu}m$ to $0.1{\mu}m$ and increases the corrosion resistance in rating number (RN) from 5 to 9.5. Our study shows that an optimal oxide film can be obtained with a pulse voltage of 150 V, which produces an excellent coating on the AZ91D casting alloy.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 춘계학술발표강연 및 논문개요집
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• pp.129-129
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• 2003

최근에 능동 영역 액정 표시 소자(Active Matrix Liquid Crystal Display, AMLCD)에서 고해상도와 빠른 응답속도를 요구하게 되면서부터 다결정 실리콘(poly-Si) 박막 트랜지스터(Thin Film Transistor, TFT)가 쓰이게 되었다. 그리고 일반적으로 디스플레이의 기판을 상대적으로 저가의 유리를 사용하기 때문에 저온 공정이 필수적이다. 따라서 새로운 저온 결정화 방법과 부가적으로 최근 디스플레이 개발 동향 중 하나인 대화면에 적용 가능한 공정인 금속유도 결정화 (Silicide Mediated Crystallization, SMC)가 연구되고 있다. 이 소자는 top-gated coplanar구조로 설계되었다. (그림 1)(100) 실리콘 웨이퍼위에 3000$\AA$의 열산화막을 올리고, LPCVD로 55$0^{\circ}C$에서 비정질 실리콘(a-Si:H) 박막을 550$\AA$ 증착 시켰다. 그리고 시편은 SMC 방법으로 결정화 시켜 TEM(Transmission Electron Microscopy)으로 SMC 다결정 실리콘을 분석하였다. 그 위에 TFT의 게이트 산화막을 열산화막 만큼 우수한 TEOS(Tetraethoxysilane)소스로 사용하여 실리콘 산화막을 1000$\AA$ 형성하였고 게이트는 3000$\AA$ 두께로 몰리브덴을 스퍼터링을 통하여 형성하였다. 이 다결정 실리콘은 3$\times$10^15 cm^-2의 보론(B)을 도핑시켰다. 채널, 소스, 드래인을 정의하기 위해 플라즈마 식각이 이루어 졌으며, 실리콘 산화막과 실리콘 질화막으로 passivation하고, 알루미늄으로 전극을 형성하였다 그리고 마지막에 TFT의 출력특성과 전이특성을 측정함으로써 threshold voltage, the subthreshold slope 와 the field effect mobility를 계산하였다.