• 한국산학기술학회논문지
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• 제5권1호
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• pp.13-15
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• 2004

고속처리를 위한 나노급의 논리소자의 개발을 위해서는 소스/드레인 영역의 저항을 감소시키는 것이 필수적이다. 반도체소자의 개발 로드맵을 제시하고 있는 ITRS의 보고에 의하면 70㎚급 MOSFET에서는 채널영역의 저항에 대비하여 그 외의 영역이 나타내는 저항성분이 약 15% 이내로 제작되어야 할 것으로 예측하고 있다. 이 기준을 유지하기 위해서는 소스/드레인 영역의 각 전류 흐름에 기인하는 가상적 기생저항에 대한 성분 분리와 이들이 가지는 저항값에 대한 정량적 계산이 이루어져야 한다. 이에 본 논문은 calibration된 TCAD simulation을 통해 나노영역의 Tr.에서 저항성분을 계산, 평가하는 방법을 연구하였다. 특히, 소스/드레인 영역의 실리사이드 접촉 저항성분들을 최소화하여 optimize하기 위한 전략을 제시한다.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권8호
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• pp.347-353
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• 2002

This paper presents an accurate method for measuring the ground resistance in powered grounding system. Most of substations and electric power equipments are interconnected to an extensive grounding network of overhead ground wires, neutral conductors of transmission lines, cable shields, and etc. The parasitic effects due to circulating ground currents and ground potential rise make a significant error in measuring the ground resistance. The test current transition method was proposed to reduce the effects of stray ground currents, ground potential rise and harmonic components in measurements of the ground resistance for powered grounding systems. The instrumental error of the test current transition method is decreased as the ratio of the test current signal to noise(S/N) increases. It was found from the test results that the proposed measuring method of the ground resistance is more accurate than the conventional fall-of-potential method or low-pass filter method, and the measuring error was less than 3[%]when S/N is 10.

• 한국전기전자재료학회논문지
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• 제27권9호
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• pp.551-554
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• 2014

This paper was showed latch up characteristics of super junction power MOSFET by parasitic thyristor according to trench etch angle. As a result of research, if trench etch angle of super junction MOSFET is larger, we obtained large latch up voltage. When trench etch angle was $90^{\circ}$, latch up voltage was more 50 V. and we got 700 V breakdown voltage. But we analyzed on resistance. if trench etch angle of super junction MOSFET is larger, we obtained high on resistance. Therefore, we need optimal point by simulation and experiment for solution of trade off.

• 전자공학회논문지
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• 제52권4호
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• pp.88-95
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• 2015

본 논문에서는 부성저항을 생성하는 회로로 알려진 RFNR 회로에 대한 새로운 분석을 소개한다. 새로운 분석에서는 RFNR 회로에 대한 수식분석의 정확성을 높이기 위해 트랜지스터의 게이트 저항과 소스 커패시턴스에 의한 영향을 고려하였다. 기존의 분석에서는 트랜지스터의 소스를 통하여 수식을 분석하였지만 제안된 수식에서는 회로의 공진부인 트랜지스터의 게이트를 통하여 회로를 분석했다. 그 결과, 제안하는 분석은 고주파수에서 기존의 분석보다 정확도를 향상시킬 수 있었다. 본 논문에서는 시뮬레이션을 통해 고주파수에서 분석의 정확도를 검증하였다.

• Asian Pacific Journal of Cancer Prevention
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• 제15권7호
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• pp.3093-3097
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• 2014

Background: Cancer is a major threat to the public health whether in developed or in developing countries. As the most common primary malignant tumor, the morbidity and mortality rate of lung cancer continues to rise in recent ten years worldwide. Chemotherapy is one of the main methods in the treatment of lung cancer, but this is hampered by chemotherapy drug resistance, especially MDR. As a component of the 60S large ribosomal subunit, ribosomal protein L39-L gene was reported to be expressed specifically in the human testis and human cancer samples of various tissue origins. Materials and Methods: Total RNA of cultured drug-resistant and susceptible A549 cells was isolated, and real time quantitative RT-PCR were used to indicate the transcribe difference between amycin resistant and susceptible strain of A549 cells. Viability assay were used to show the amycin resistance difference in RPL39-L transfected A549 cell line than control vector and null-transfected A549 cell line. Results: The ribosomal protein L39-L transcription level was 8.2 times higher in drug-resistant human lung cancer A549 cell line than in susceptible A549 cell line by quantitative RT-PCR analysis. The ribosomal protein L39-L transfected cells showed enhanced drug resistance compared to plasmid vector-transfected or null-transfected cells as determined by methyl tritiated thymidine (3H-TdR) incorporation. Conclusions and Implications for Practice: The ribosomal protein L39-L gene may have effects on the drug resistance mechanism of lung cancer A549 cells.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1293-1296
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• 2008

As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.13-14
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• 2000

21.6" a-Si:H TFT array for direct conversion X-ray detector with 2480 by 3072 pixel is successfully developed. To obtain good X-ray image quality, novel structure, storage on BCB structure, is proposed. The structure reduces the parasitic capacitance of data line, one of the main sources of signal noise. Also, the structure shows higher failure resistance against defects than that of the old design.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.487-488
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• 2019

본 연구는 인덕터, 커패시터의 기생저항을 고려한 Buck Converter의 회로 해석 및 Two Loop Control 방법의 제어기 설계를 제안한다. 일반적인 Buck Converter의 회로 및 제어기 설계에서는 인덕터, 커패시터의 기생저항의 값이 작아 0으로 간주한다. 본 논문에서는 인덕터와 커패시터의 기생저항을 고려한 회로를 수학적으로 해석한 뒤 Matlab SISOTOOL을 이용하여 전압 및 전류 제어기를 설계하고 PSIM을 통해 회로를 구성하여 시뮬레이션을 통해 검증함으로써 일반적인 설계보다 정확성을 가진 설계방법을 제안한다.

• 전력전자학회논문지
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• 제21권4호
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• pp.356-363
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• 2016

The design methodology of an adequate input voltage and magnetizing inductance to minimize reactive power is suggested to design a wireless power transfer (WPT) converter for high-power transfer efficiency. To increase the magnetizing inductance, the turn number of the WPT coil is increased, thus causing high parasitic resistance in the WPT coil. Moreover, the high coil resistance produces high conduction loss in the transfer and receive coils. Therefore, the analysis of conduction loss is used in the design of the WPT coil and the operating point of the WPT converter. To verify the proposed design methodology, the mathematical analysis of the conduction loss is presented by experimental results.

• 전자공학회논문지B
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• 제32B권11호
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• pp.1374-1382
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• 1995

In TFT-LCDs, as the display size area becomes larger, and the resolution higher, we have to consider the image degradation effects due to the incorporation of the TFT-LCD parameters such as the data-line resistance, the common electrode resistance, the data-line to common parasitic capacitance, and the output characteristics of driver ICs. One of the degradation effects is crosstalk resulting from the coupling between the source bus-line and common electrode. Since a source signal which represents a large number of display data is supposed to vary frequently, the common signal level is affected through the coupling effect, resulting in the degradation of nearby pixel drive signals. Therefore, we proposed a method to compensate for this source-common electrode coupling effect, we also designed and experimented the feasibility of our crosstalk compensation circuit in the actual TFT-LCD. We saw that the newly designed compensation circuit greatly reduced the crosstalk in display pattern image.