• Title/Summary/Keyword: parallelism control

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Developed 3-axis Educational CNC Machine Tool (3축 CNC 교육용 공작기계 개발)

  • Jang, Sung-Wook
    • Journal of the Korean Society of Industry Convergence
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    • v.22 no.6
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    • pp.627-635
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    • 2019
  • In this study, we developed for processing complex features using CAM software that satisfies precision for example practice and related qualification tests suiTable for CNC training purposes. In addition, functions such as location control, speed control, and processing path generation, which are the main functions of CNC machining machines, were constructed using small equipment parts, servo motors, inverters, general purpose PCs, and commercial NC software and researched with the goal of developing low-cost education equipment. In the static accuracy inspection, the degree of machine when measuring the parallelism of the X, Y and Z axes and the vibration of the main shaft did not reach the allowable value. However, we have obtained a finished product that satisfies the CNC machine book sample shape machining, detailed functions of the position control function of the CNC machine tool, linear interpolation function, circular interpolation function, and tool offset function. In the qualification test shape processing, a shape with a degree of 1/100 mm was processed to obtain position accuracy that satisfied the tolerance.

A Case Study on Developing a Checking System of Gear Parts (기어 부품의 검사시스템 개발에 관한 사례)

  • Yun, Tae-Hong;Byun, Jai-Hyun
    • IE interfaces
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    • v.21 no.4
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    • pp.378-384
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    • 2008
  • Small sized companies have not been successful in systematically applying statistical process control because of insufficient human resources. In this paper we present a case study of automatic checking system for a small sized company which produces various types of gears. A systematic way of automatically measuring gears is proposed and statistical analysis methods are presented. To reduce variation in the measurement data, a standard operating procedure is also proposed. This case study can be helpful to quality assurance practitioners of small sized companies who are willing to develop checking or inspection systems for their products.

A Branch Misprediction Recovery Mechanism using Control Independence (제어 독립성을 이용한 분기 예상 실패 복구 메커니즘)

  • 윤성룡;신영호;박홍준;조영일
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.10c
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    • pp.636-638
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    • 2000
  • 제어 독립성(Control Independence)은 슈퍼스칼라 프로세서에서 명령어 수준 병렬성(Instruction-Level Parallelism)을 향상시키기 위한 중요한 요소로 작용하고 있다. 분기 예상기법(Branch Prediction Mechanism)에서 잘못 예상될 경우에는 예상한 분기 방향의 명령어들을 제거하고 올바른 분기 방향의 명령어들을 다시 반입하여 수행해야 한다. 본 논문에서는 컴파일 시 프로파일링을 통한 정적인 방법과 프로그램상의 제어 흐름을 통해 동적으로 제어 독립적인 명령어를 탐지함으로써 분기 명령어의 잘못된 예상으로 인해 제거되는 명령어를 효과적으로 감소시켜 프로세서의 성능을 향상시키는 메커니즘을 제안한다. SPECint95 벤치마크 프로그램에 대해 기존의 방법과 본 논문에서 제안한 방법 사이의 사이클 당 수행된 명령어 수를 분석한 결과, 4-width 프로세서에서 4%~6%, 8-width 프로세서에서 11%~18%, 16-width 프로세서에서 15%~17%의 성능 향상을 보이고 있다.

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Computer Application to ECG Signal Processing

  • Okajima, Mitsuharu
    • Journal of Biomedical Engineering Research
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    • v.6 no.2
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    • pp.13-14
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    • 1985
  • We have developed a microprogramir!able signal processor for real-time ultrasonic signal processing. Processing speed was increased by the parallelism in horizontal microprogram using 104bits microcode and the Pipelined architecture. Control unit of the signal processor was designed by microprogrammed architec- ture and writable control store (WCS) which was interfaced with host computer, APPLE- ll . This enables the processor to develop and simulate various digital signal processing algorithms. The performance of the processor was evaluated by the Fast Fourier Transform (FFT) program. The execution time to perform 16 bit 1024 points complex FF7, radix-2 DIT algorithm, was about 175 msec with IMHz master Clock. We can use this processor to Bevelop more efficient signal processing algorithms on the biological signal processing.

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A Study on the Bit-slice Signal Processor for the Biological Signal Processing (생체 신호처리용 Bit-slice Signal Processor에 관한 연구)

  • Kim, Yeong-Ho;Kim, Dong-Rok;Min, Byeong-Gu
    • Journal of Biomedical Engineering Research
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    • v.6 no.2
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    • pp.15-22
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    • 1985
  • We have developed a microprogramir!able signal processor for real-time ultrasonic signal processing. Processing speed was increased by the parallelism in horizontal microprogram using 104bits microcode and the Pipelined architecture. Control unit of the signal processor was designed by microprogrammed architec- ture and writable control store (WCS) which was interfaced with host computer, APPLE- ll . This enables the processor to develop and simulate various digital signal processing algorithms. The performance of the processor was evaluated by the Fast Fourier Transform (FFT) program. The execution time to perform 16 bit 1024 points complex FF7, radix-2 DIT algorithm, was about 175 msec with IMHz master Clock. We can use this processor to Bevelop more efficient signal processing algorithms on the biological signal processing.

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Abstract Visualization for Effective Debugging of Parallel Programs Based on Multi-threading (멀티 스레딩 기반 병렬 프로그램의 효과적인 디버깅을 위한 추상적 시각화)

  • Kim, Young-Joo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.3
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    • pp.549-557
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    • 2016
  • It is important for effective visualization to summarize not only a large amount of debugging information but also the mental models of abstract ideas. This paper presents an abstract visualization tool which provides effective visualization of thread structure and race information for OpenMP programs with critical sections and nested parallelism, using a partial order execution graph which captures logical concurrency among threads. This tool is supported by an on-the-fly trace-filtering technique to reduce space complexity of visualization information, and a graph abstraction technique to reduce visual complexity of nested parallelism and critical sections in the filtered trace. The graph abstraction of partial-order relation and race information is effective for understanding program execution and detecting to eliminate races, because the user can examine control flow of program and locations of races in a structural fashion.

Design of a Hybrid Data Value Predictor with Dynamic Classification Capability in Superscalar Processors (슈퍼스칼라 프로세서에서 동적 분류 능력을 갖는 혼합형 데이타 값 예측기의 설계)

  • Park, Hee-Ryong;Lee, Sang-Jeong
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.8
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    • pp.741-751
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    • 2000
  • To achieve high performance by exploiting instruction level parallelism aggressively in superscalar processors, it is necessary to overcome the limitation imposed by control dependences and data dependences which prevent instructions from executing parallel. Value prediction is a technique that breaks data dependences by predicting the outcome of an instruction and executes speculatively its data dependent instruction based on the predicted outcome. In this paper, a hybrid value prediction scheme with dynamic classification mechanism is proposed. We design a hybrid predictor by combining the last predictor, a stride predictor and a two-level predictor. The choice of a predictor for each instruction is determined by a dynamic classification mechanism. This makes each predictor utilized more efficiently than the hybrid predictor without dynamic classification mechanism. To show performance improvements of our scheme, we simulate the SPECint95 benchmark set by using execution-driven simulator. The results show that our scheme effect reduce of 45% hardware cost and 16% prediction accuracy improvements comparing with the conventional hybrid prediction scheme and two-level value prediction scheme.

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A Study on the Optimization and Parallelism Information Representation using Ideograph (Ideograph를 이용한 최적화 및 병렬성 정보 표현에 관한 연구)

  • 정성옥;고광만
    • Journal of Intelligence and Information Systems
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    • v.6 no.2
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    • pp.41-47
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    • 2000
  • Ideograph is a truly unifies data and procedural dependencies. Ideograph can be used to assist various program optimization, such as common expression elimination, code motion, constant folding etc. In this paper, we propose an improved representation of the data and control flow dependencies information for the efficient program execution. In pursuing this goal, we propose a model and in particularly implement a dependency information extractor and information table, which contains data and control flow information per a basic block And then we design and implementation of the optimized abstract syntax tree using Ideograph which has a control flow information and data flow information for source program.

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Control of Feed Rate Using Neurocontroller Incorporated with Genetic Algorithm in Fed-Batch Cultivation of Scutellaria baicalensis Georgi

  • Choi, Jeong-Woo;Lee, Woochang;Cho, Jin-Man;Kim, Young-Kee;Park, Soo-Yong;Lee, Won-Hong
    • Journal of Microbiology and Biotechnology
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    • v.12 no.4
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    • pp.687-691
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    • 2002
  • To enhance the production of flavonoids [baicalin, wogonin-7-Ο-glucuronic acid (GA)], which are secondary metabolites of Scutellaria baicalensis Georgi(G.) plant cells, a multilayer perceptron control system was applied to regulate the substrate feeding in a fed-batch cultivation. The optimal profile for the substrate feeding rate in a fed-batch culture of S. baicalensis G. was determined by simulating a kinetic model using a genetic algorithm. Process variable profiles were then prepared for the construction of a multilayer perceptron controller that included massive parallelism, trainability, and fault tolerance. An error back-propagation algorithm was applied to train the multiplayer perceptron. The experimental results showed that neurocontrol incorporated with a genetic algorithm improved the flavonoid production compared with a simple fuzzy logic control system. Furthermore, the specific production yield and flavonoid productivity also increased.

Complete collapse test of reinforced concrete columns

  • Abdullah, Abdullah;Takiguchi, Katsuki
    • Structural Engineering and Mechanics
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    • v.12 no.2
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    • pp.157-168
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    • 2001
  • In this paper, experimental investigation into the behavior of reinforced concrete (RC) columns tested under large lateral displacement with four different types of loading arrangements is presented. Each loading arrangement has a different system for controlling the consistency of the loading condition. One of the loading arrangements used three units of link mechanism to control the parallelism of the top and bottom stub of column during testing, and the remaining employed eight hydraulic jacks for the same purpose. The loading systems condition used in this investigation were similar to the actual case in a moment-resisting frame where the tested column was displaced in a double curvature. Ten model column specimens, divided into four series were prepared. Two columns were tested monotonically until collapse, and unless failure took place at an earlier stage of loading, the remaining eight columns were tested under cyclic loading. Test results indicated that the proposed system to keep the top and bottom stubs parallel during testing performed well.