• 제목/요약/키워드: parallel machines

검색결과 208건 처리시간 0.03초

순서 독립적인 셋업타임을 가진 동일작업의 병렬기계 배치스케줄링 (Parallel Machine Scheduling with Identical Jobs and Sequence-Independent Setup Times)

  • 최병천;박명주
    • 한국경영과학회지
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    • 제39권3호
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    • pp.83-91
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    • 2014
  • We consider the problem of scheduling identical jobs with sequence-independent setup times on parallel machines. The objective is to minimize total completion times. We present the pseudopolynomial-time algorithm for the case with a fixed number of machines and an efficient approximation algorithm for our problem with identical setup times, which is known to be NP-hard even for the two-machine case.

Parallel Operation of Trans-Z-Source Network Full-Bridge DC-DC Converter for Wide Input Voltage Range

  • Lee, Hyeong-Min;Kim, Heung-Geun;Cha, Hon-Nyong
    • Journal of international Conference on Electrical Machines and Systems
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    • 제1권2호
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    • pp.98-104
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    • 2012
  • This paper presents a novel transformer isolated parallel connected full-bridge dc-dc converter using recently developed trans-Z-source network. Unlike the traditional voltage -fed or current-fed converters, the proposed converter can be open- and short-circuited without damaging switching devices. Therefore, the desired buck and boost function can be achieved and the converter reliability can be greatly improved. A 6 kW prototype dc-dc converter is built and tested to verify performances of the proposed converter.

A Novel Control Strategy for Input-Parallel-Output-Series Inverter System

  • Song, Chun-Wei;Zhao, Rong-Xiang;Lin, Wang-Qing;Zeng, Zheng
    • Journal of international Conference on Electrical Machines and Systems
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    • 제1권2호
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    • pp.85-90
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    • 2012
  • This paper presents a topology structure and control method for an input-parallel-output-series(IPOS) inverter system which is suitable for high input current, high output voltage, and high power applications. In order to ensure the normal operation of the IPOS inverter system, the control method should achieve input current sharing(ICS) and output voltage sharing(OVS) among constituent modules. Through the analysis in this paper, ICS is automatically achieved as long as OVS is controlled. The IPOS inverter system is controlled by a three-loop control system which is composed of an outer common-output voltage loop, inner current loops and voltage sharing loops. Simulation results show that this control strategy can achieve low total harmonic distortion(THD) in the system output voltage, fast dynamic response, and good output voltage sharing performance.

Parallel Multiple Electric Power Conversion System Constructed by Connecting Three Power Converters

  • Nakai, Mitsuki;Inaba, Hiromi;Kishine, Keiji;Ishikura, Keisuke
    • Journal of international Conference on Electrical Machines and Systems
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    • 제3권3호
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    • pp.276-281
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    • 2014
  • The electric power conversion system constructed by connecting two or more power converters in parallel is an advantageous method for making to large capacity and standardization. In this paper, the control method of cross current when three power converters are operated is examined, and it reexamined a preferable system construction method.

일시(一時) 작업중단(作業中斷)을 허용(許容)하는 순서종속작업(順序從屬作業)을 병행기계(並行機械)로서 makespan 최소화(最小化)를 도모(圖謀)하는 발견적(發見的) 방법(方法) (Heuristic Procedure on Minimizing Makespan for Preemptive Sequence Dependent Job Scheduling with Parallel Identical Machines)

  • 원진희;김만식
    • 대한산업공학회지
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    • 제13권2호
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    • pp.35-46
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    • 1987
  • To minimize makespan for preemptive sequence dependent job scheduling with parallel identical processors, fundamental results, as the basis of new algorithm to be presented, such as McNauton's algorithm for independent jobs, Hu's characterization for dependent jobs, and Muntz-Coffman's algorithm, were first introduced. Then a huristic procedure was presented applying those concepts of zoning of assembly line balancing and of resource leveling on CPM network scheduling with two or more of parallel machines in general. New procedure has eliminated presumative machine assignment using ${\rho}$, rate of resource capability (${\rho}$ < 1), for practical scheduling.

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이종 병렬설비 공정의 납기지연시간 최소화를 위한 유전 알고리즘 (A Genetic Algorithm for Minimizing Total Tardiness with Non-identical Parallel Machines)

  • 최유준
    • 산업경영시스템학회지
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    • 제38권1호
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    • pp.65-73
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    • 2015
  • This paper considers a parallel-machine scheduling problem with dedicated and common processing machines using GA (Genetic Algorithm). Non-identical setup times, processing times and order lot size are assumed for each machine. The GA is proposed to minimize the total-tardiness objective measure. In this paper, heuristic algorithms including EDD (Earliest Due-Date), SPT (Shortest Processing Time) and LPT (Longest Processing Time) are compared with GA. The effectiveness and suitability of the GA are derived and tested through computational experiments.

Scheduling for a Two-Machine, M-Parallel Flow Shop to Minimize Makesan

  • Lee, Dong Hoon;Lee, Byung Gun;Joo, Cheol Min;Lee, Woon Sik
    • 산업경영시스템학회지
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    • 제23권56호
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    • pp.9-18
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    • 2000
  • This paper considers the problem of two-machine, M-parallel flow shop scheduling to minimize makespan, and proposes a series of heuristic algorithms and a branch and bound algorithm. Two processing times of each job at two machines on each line are identical on any line. Since each flow-shop line consists of two machines, Johnson's sequence is optimal for each flow-shop line. Heuristic algorithms are developed in this paper by combining a "list scheduling" method and a "local search with global evaluation" method. Numerical experiments show that the proposed heuristics can efficiently give optimal or near-optimal schedules with high accuracy. with high accuracy.

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High Performance Fortran 병렬 프로그래밍 변환기의 구현 및 성능 평가 (Implementation and Performance Evaluation of Parallel Programming Translator for High Performance Fortran)

  • 김중권;홍만표;김동규
    • 한국정보처리학회논문지
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    • 제6권4호
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    • pp.901-915
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    • 1999
  • 분산 메모리 병렬 컴퓨터의 성능을 충분히 활용하고 프로그래밍의 난이도아 기종간 프로그램의 호환성을 해결하기 위하여 시스템 독립적이고 쉽게 프로그래밍 할 수 있는 데이터 병렬 언어에 대한 연구가 최근에 활발히 진행되고 있다. 대표적인 데이터 병렬 언어인 HPF 컴파일러는 사용자가 정의한 정보를 이용하여 데이터와 연산을 프로세서에 분할하여 할당하고, 메시지 패싱을 생성하는 기능을 제공함으로써 프로그램 작성자에게 전역 주소 공간을 이용하여 병렬 프로그램을 쉽게 개발 할 수 있는 기반을 제공한다. 본 논문에서는 데이터 종속성 분석, 데이터 및 연산 분할과 메시지 패싱 코드 생성의 4단계를 통하여, HPf 입력 프로그램을 MPI 메시지 패싱 코드가 삽입된 SPMD 프로그램으로 변환하는 HPF 병렬 프로그래밍 언어 변환기인 PPTran을 구현하고 그 성능을 검증한다.

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고속 네트웍 기반의 분산병렬시스템에서의 성능 향상 분석 모델 (Speedup Analysis Model for High Speed Network based Distributed Parallel Systems)

  • 김화성
    • 한국통신학회논문지
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    • 제26권12C호
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    • pp.218-224
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    • 2001
  • 분산병렬처리의 목적은 다양한 내재 병렬 형태의 특징을 갖는 연산 집약적 문제를 고속 네트웍으로 연결되어진 다수의 고성능 및 병렬 컴퓨터들의 각기 다른 능력을 최대한 이용하여 해결함에 있다. 본 논문에서는 분산병렬시스템을 이용하는 경우의 성능 향상 분석을 위해 일반적인 그래프 표현 방법을 포함하는 계산 모델을 제안하고 프로그램의 수행을 위한 스케쥴링 시에 성능 향상이 어떠한 요인에 의해 달성되는지를 분석한다. 제안된 표현 방법은 동기종 및 이기종 시스템 모두에 적용되어질 수 있다. 분산병렬 시스템에서 스케줄링을 통하여 더 많은 속도향상을 얻기 위해서는 태스크와 병렬 컴퓨터간의 병렬특성의 일치가 주의 질게 다루어져야 하며 태스크의 이동으로 인한 통신 오버 헤드가 최소화 되어야 한다.

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혼합 흐름공정에서 라인 밸런싱을 위한 휴리스틱 개발 (Heuristics for Line Balancing in Hybrid Flowshops)

  • 이근철
    • 산업경영시스템학회지
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    • 제30권3호
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    • pp.94-102
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    • 2007
  • In this paper, we consider a line balancing problem in hybrid flowshops where each workstation has identical parallel machines. The number of machines in each workstation is determined in ways of satisfying pre-specified throughput rate of the system. To minimize the total number of machines in the systems, we propose five heuristic methods and one simulated annealing method. Extensive computational experiments found the superiorities of two heuristic methods and the meta-heuristic.