• Transactions of the Society of Information Storage Systems
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• v.2 no.3
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• pp.163-168
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• 2006

Small form factor optical pickup (SFFOP) corresponding to BD specifications is strongly proposed for the next-generation portable storage device. In order to generate SFFOP, small sized optical pickup has been fabricated. We have developed a small sited optical pickup that is called the integrated optical pickup (IOP). The fabrication method of this system is mainly dependant on the use of the wafer based micro fabrication technology, which has been used in MEMS process such as photolithography, reactive ion etching, wafer bonding, and packaging process. This approach has the merits for mass production and high assembling accuracy. In this study, to generate the small sized optical pickup for high recording capacity, IOP corresponding to BD specifications has been designed and developed, including three main parts, 1) design, fabrication and evaluation of objective lens unit, 2) design and fabrication of IOP and 3) evaluation process of FES and TES.

• ETRI Journal
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• v.38 no.6
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• pp.1179-1189
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• 2016

A chemorheological analysis of a no-flow underfill was conducted using curing kinetics through isothermal and dynamic differential scanning calorimetry, viscosity measurement, and solder (Sn/27In/54Bi, melting temperature of $86^{\circ}C$) wetting observations. The analysis used an epoxy system with an anhydride curing agent and carboxyl fluxing capability to remove oxide on the surface of a metal filler. A curing kinetic of the no-flow underfill with a processing temperature of $130^{\circ}C$ was successfully completed using phenomenological models such as autocatalytic and nth-order models. Temperature-dependent kinetic parameters were identified within a temperature range of $125^{\circ}C$ to $135^{\circ}C$. The phenomenon of solder wetting was visually observed using an optical microscope, and the conversion and viscosity at the moment of solder wetting were quantitatively investigated. It is expected that the curing kinetics and rheological property of a no-flow underfill can be adopted in arbitrary processing applications.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.3
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• pp.1-9
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• 2001

This paper proposes an inspection algorithm for micro ball grid array ($\mu$BGA) solder balls. This algorithm is motivated by the difficulty of finding defect balls by human visual inspection due to their small dimensions. Specifically, it is developed herein an automated vision-based inspection algorithm for $\mu$BGA's, which can inspect solder balls not only for so-called two dimensional errors, such as missings, positions and sizes, but also for height errors. The inspection algorithm uses two dimensional images of $\mu$BGA obtained through special blue illumination, and processes them with a rotation-invariant sub algorithm. It can also detect height errors when a two-camera system is available. Simulation results show that the proposed algorithm is more efficient in detecting ball defects compared with the conventional algorithms.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.3
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• pp.63-67
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• 2001

Up to now, most studies about Pt-etching have been focused on physical sputtering mechanism with Cl-based plasma, while only a limited results are available for etching characteristics with fluorine-based plasma. In this study, etch characteristics of Pt thin film with $Cl_2$/Ar and $SF_{6}$/Ar Ar gas chemistries have been studied with ECR plasma etching system. It is confirmed that $SF_{6}$/Ar Ar plasma chemistry could make volatile etch-products through the reaction with Pt thin film. Also the improvement in etch rate, etch profile and surface roughness is obtained due to the formation of volatile platinum fluoride compounds.

• IE interfaces
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• v.25 no.2
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• pp.264-275
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• 2012

The process of semiconductor(IC Package) manufacturing usually includes lots of complex and sequential processes. Many kinds of equipments are installed with the mixed concept of serial and parallel manufacturing system. The business environments of the semiconductor industry have been changed frequently, because new technologies are developed continuously. It is the main reason of new investment plan and layout consideration. However, it is difficult to change the layout after installation, because the major equipments are expensive and difficult to move. Furthermore, it is usually a multiple-objective problem. Thus, new investment or layout change should be carefully considered when the production environments likewise product mix and production quantity are changed. This paper introduces a simulation case study of a Korean company that produces packaging substrates(especially lead frames) and requires multi-objective decision support. $QUEST^{(R)}$ is used for simulation modelling and AHP(Analytic Hierarchy Process) and DEA(Data Envelopment Analysis) are used for weighting of qualitative performance measures and solving multiple-objective layout problem, respectively.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.109-119
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• 2003

o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.159-163
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• 2002

So far, many kinds of researches on the chip components and MCM-C RF module especially on the 3-dimensional ceramic module using embedded passives have been performed. LTCC system has many kinds of advantages, like low loss, low cost of process, stability of process etc..The electrical behaviors of components are affected by that of the material systems including dielectrics and conductors. In this study, many kinds of conductor pastes in the variation with metal content and grain size are fabricated and their effect on the characteristics of stripline resonator are examined upto 6 ㎓.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1587-1588
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• 2006

Tn this paper, PCB (Printed Circuit Board) embedded $BaTiO_3$ MIM capacitors were designed, fabricated, and characterized for low cost organic SOP applications by using 3-D EM simulator and low temperature processes. Size of electrodes and thickness of high dielectric films are optimized for improving the performance characteristics of the proposed embedded MIM capacitors at high frequency regime. The selected thicknesses of the $BaTiO_3$ film are $12{\mu}m$, $16{\mu}m$, and $20{\mu}m$. The fabricated MIM capacitor with dielectric constant of 30 and thickness of $12{\mu}m$ has capacitance density of $21.5p\;F/mm^2$ at 100MHz, maximum quality factor of 37.4 at 300 MHz, a quality factor of 30.9 at 1GHz, self resonant frequency of 5.4 GHz, respectively. The measured capacitances and quality factors are well matched with 3-D EM simulated ones. These embedded capacitors are promising for SOP based advanced electronic systems with various functionality, low cost, small size and volume.

• KOREAN JOURNAL OF PACKAGING SCIENCE & TECHNOLOGY
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• v.27 no.2
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• pp.101-107
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• 2021

Time-temperature integrators (TTIs) based on aqueous enzyme solutions produce transparent colors which lead to difficulty in distinguishing its color change by naked eye. In this present study, this issue has been solved by increasing the opacity of laccase-based TTI without changes in the kinetics (same zero-order reaction) and temperature dependency (similar Arrhenius activation energy values) of the color change. The opacity was increased by introducing TiO₂, latex, BaSO₄, or ZnO, in combination with a hydrocolloid (xanthan gum, acacia gum, pectin, and CMC) into the TTI system. The combination of TiO₂ and xanthan gum was the best. This finding broadened the advantages of laccase-based TTI to more practical uses for consumer convenience.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.25-34
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• 2018

In this paper, we review the latest technical progress and commercialization of stretchable interconnectors, stretchable strain sensors, and stretchable substrates for stretchable electronics. The development of stretchable electronics can pave a way for new applications such as wearable devices, bio-integrated devices, healthcare and monitoring, and soft robotics. The essential components of stretchable electronic devices are stretchable interconnector and stretchable substrate. Stretchable interconnector should have high stretchability and high electrical conductivity as well as stability under severe mechanical deformation. Therefore several nanocomposite-based materials using CNT, graphene, nanowire, and metal flake have been developed. Geometric engineering such as wavy, serpentine, buckled and mesh structure has been well developed. Stretchable substrate should also pose high stretchability and compatibility with stretchable sensing or interconnecting material. We summarize the recent research results of new materials for stretchable interconnector and substrate as well as strain sensors. The Important challenges in development of the stretchable interconnector and substrate are also briefly discussed.