• Korean Journal of Materials Research
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• v.9 no.1
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• pp.104-107
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• 1999

We investigated the effects of cooling condition on deep levels and iron precipitate formation in iron-contaminated p-type silicon by DLTS(Deep Level Transient Spectroscopy) and preferential etching technique. Dependency of cooling condition on Bulk Micro-Defect (BMD) and four different iron-related deep traps were observed. For normal cooling condition, T1, T2, T3, T4 traps that related to Fe\ulcorner or Fe-O complex were obtained. However, the trap with activation energy, 0.4 eV was observed for slow cooling condition. The trap caused by the $\textrm{Fe}^{+}\textrm{}^{-}$ pair (H4:0.56eV) were detected only at the case of $\textrm{LN}_{2}$ quenching condition.

• Proceedings of the KAIS Fall Conference
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• 2002.05a
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• pp.151-154
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• 2002

반도체 소자의 기판 재료로 사용되고 있는 실리콘 웨이퍼는 그 정밀도가 매우 중요하다. 본 연구에서는 균일한 Dopant 농도 분포를 얻을 수 있는 중성자 변환 Doping을 이용하여 실리콘에 인(P)을 Doping하는 연구를 수행하였다. 중성자 변환 Doping, 즉 NTD(Neutron Transmutation Doping)란 원자번호 30인 실리콘 동위원소에 중성자가 조사되면 원자번호 31인 실리콘으로 변환되고, 2.6시간의 반감기를 갖고 decay 되면서 인(P)으로 변하게 되어 실리콘 웨이퍼에 n-type 전도를 갖게 하는 것을 말한다. 본 연구에서는 하나로 원자로를 이용하여 고저항(1000-2000Ωcm) FZ 실리콘 웨이퍼 에 두 개의 조사공에서 중성자 조사하여 저항의 변화를 관찰하였고, 중성자 조사시 발생하는 점결함을 분석하여 점결함이 저항 변화에 미치는 영향을 알아보았다. 중성자 조사 전 이론적 계산에 의해 HTS조사공은 5Ωcm, 20.1Ωcm 이고 IP3조사공은 5Ωcm, 26.5Ωcm, 32.5Ωcm 이었고, 중성자 조사 후 SRP로 측정한 결과 실제 저항값은 HTS-1 2.10Ωcm, HTS-2 7.21Ωcm 이었고, IP-1은 1.79Ωcm, IP-2는 6.83Ωcm, 마지막으로 IP-3는 9.23Ωcm 이었다. DLTS 측정 결과 IP조사공에서 새로운 피의 결을 발견할 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.17-18
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• 2006

고상 확산 방법을 이용하여 얕은 소스/드레인 접합을 가지는 SOI (Silicon-On-Insulator) MOSFET 소자를 제작하였다. 확산원으로는 PSG(Phosphorus silicate glass) 박막과 PBF(Poly Boron Film) 박막이 각각 n, p-type 소자 형성을 위해 사용되었다. 얕은 접합 형성을 위하여 급속 열처리 방법(RTA: Rapid Thermal Annealing)을 이용하여 PSG와 PBF로부터 인과 붕소를 SOI MOSFET 소자의 소스/드레인으로 확산시켰다. 또한, 소자 특성 개선을 위한 후 속 열처리 공정으로 희석된 수소 분위기 중에서 FA(Furnace Annealing)를 실시하였다. SPD 기술을 적용하여 10 nm 이하의 매우 얕은 p-n 접합을 형성할 수 있었고, 양호한 다이오드 특성을 얻을 수 있었다. 또한, SPD 방법으로 결함이 없는 접합 형성이 가능하며, 소자 제작 공정의 최적화를 통해 차세대 CMOS 소자로 기대되는 SOI MOSFET를 성공적으로 제작할 수 있었다.

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.204-206
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• 1993

In this paper we represented electroplating process without seed layers for making metal micro structures needed for applying terminal voltage for one-to-one cell fusion system. In this system, we need thick insulator and metal structures because the diameter of a cell is approximately $40{\mu}m$. So, we adopted the photo-sensitive polyimide as electroplating molds and structural material. Generally, the processes utilizing the photo-sensitive polyimide as molds have metal seed layers on the substrate as electroplating electrodes and requires wiring tasks to these seed layers. We proposed electroplating process without any seed layer on the Si-substrate and simulated P-N-P (electrode - Si substrate - electrode) junction on N-type silicon substrate. Leakage current from one metal structure to another which arise when terminal voltage is applied can be remarkably decreased by doping Boron in the region to be electroplated.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.270-272
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• 2005

The behavior of surface oxidation on cobalt silicide layer was investigated under rapid thermal oxidation (RTO) conditions. The cobalt silicide layer was prepared on p-type silicon substrates. We used Ti thin film as a capping layer in order to measure the degree of oxidation of the layer. Oxide grew faster on the cobalt silicide prepared with the Ti capping layer to reach ca $500{\AA}$ at $700^{\circ}C$ in thickness. The oxide film kept growing under $550^{\circ}C\~700^{\circ}C$ of the RTO condition, resulting in a saturated state above $500{\AA}$.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.7
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• pp.298-304
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• 2003

IPMC(Ionic Polymer-Metal Composite) is a highly sensitive actuator that shows a large deformation in presence of low applied voltage. Generally, IPMC can be fabricated by electroless plating of platinum on both sides of a Nafion (perfluorosulfonic acid) film. When a commercial Nafion film is used as a base structure of the IPMC membrane, the micro-pump structure and the IPMC membrane are fabricated separately and then later assembled, which makes the fabrication inefficient. Therefore, fabrication of an IPMC membrane and the micro-pump structure on a single wafer without the need of assembly have been developed. The silicon wafer was partially etched to hold liquid Nafion to be casted and a 60-${\mu}{\textrm}{m}$ thick IPMC membrane was realized. IPMC membranes with various size were fabricated by casting and they showed 4-2${\mu}{\textrm}{m}$ displacements from $4mm{\times}4mm$ , $6mm{\times}6mm$, $8mm{\times}8mm$ membranes at the applied voltage ranging from 2Vp-p to 5Vp-p at 0.5Hz. The displacement of the fabricated IPMC membranes is fairly proportional to the membrane area and the applied voltage.

• Journal of Sensor Science and Technology
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• v.9 no.1
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• pp.70-75
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• 2000

The recycled single crystal silicon wafers have been fabricated into solar cells. It can be a solution for the high cost in materials for solar cells and recycling of materials. So, p-type (100) single crystal silicon wafers with high resistivity of $10-14\;{\Omega}cm$ and the thickness of $650\;{\mu}m$ were used for the fabrication of solar cells. Optimistic conditions of formation of back surface field, surface texturing and anti-reflection coating were studied for getting high efficiency. In addition, thickness variation of solar cell was also studied for increase of efficiency. As a result, the solar cell with efficiency of 10% with a curve fill factor of 0.53 was fabricated with the wafers which have the area of $4\;cm^2$ and thickness of $300\;{\mu}m$. According to above results, recycling possibility of wasted wafers to single crystal silicon solar cells was confirmed.

• Journal of Marine Life Science
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• v.9 no.1
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• pp.22-32
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• 2024

The purpose of this study was to determine the effect of external biologger attachment methods on the blood parameters and attachment efficiency of spotted sea bass Lateolabrax maculatus (mean body weight 2630.8 g). The fish were tagged using four different external attachment methods with dummy biologgers: no attachment (control), anchor attachment (AA), monofilament attachment (MA), and silicon tube attachment (SA), each with triplicates. Blood indices and biologger attachment efficiency were assessed on days 1, 7, 14, 28, 56, and 84 after attachment. The concentrations of hematocrit, Na⁺, Cl^-, glutamic pyruvic transaminase and total protein, and the activity of superoxide dismutase in blood were not affected by the external attachment method of biologger. The concentrations of glutamic oxaloacetic transaminase (day 1 of attachment), hemoglobin (day 56) and total cholesterol (day 56 and 84) in AA group, the concentrations of glucose and cortisol (day 14) and total cholesterol (day 84) in MA group showed significantly higher than those of control (p<0.05). During the experiment period, the SA group had no differences from the control in all blood properties. The biologger attachment efficiencies of the AA, MA, and SA groups after 84 days were 0.0%, 33.3%, and 100.0%, respectively. These results indicate that the optimum external biologger attachment method under our experimental conditions is SA type.

• Journal of IKEEE
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• v.13 no.4
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• pp.23-27
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• 2009

Ohmic contact formation and etching processes for the fabrication of MBE (molecular beam epitaxy) grown GaSb-based p-channel HEMT devices on Si substrate have been studied. Firstly, mesa etching process was established for device isolation, based on both HF-based wet etching and ICP-based dry etching. Ohmic contact process for the source and drain formation was also studied based on Ge/Au/Ni/Au metal stack, which resulted in a contact resistance as low as $0.683\;{\Omega}mm$ with RTA at $320^{\circ}C$ for 60s. Finally, for gate formation of HEMT device, gate recess process was studied based on AZ300 developer and citric acid-based wet etching, in which the latter turned out to have high etching selectivity between GaSb and AlGaSb layers that were used as the cap and the barrier of the device, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.87-88
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• 2006

Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.